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SC668 датащи(PDF) 40 Page - Semtech Corporation

номер детали SC668
подробное описание детали  8 LED Light Management Unit Automatic Dropout Prevention , Ambient Light Sense Input, PWM Dimming, and 4 LDOs
PDF  46 Pages
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производитель  SEMTECH [Semtech Corporation]
домашняя страница  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

SC668 датащи(HTML) 40 Page - Semtech Corporation

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SC668
40
Register Map (continued)
ADC Function Register (12h)
This register is used to enable the functions of the ADC
and store related status bits. The ADC converts the analog
output voltage signal of an ALS (Ambient Light Sense)
circuit and stores the digital conversion in the ADC output
AD
OUT (register 13h). The data may be used to automati-
cally adjust the brightness of bank #1 backlights in
response to changes in ambient lighting conditions.
AD_CMP [D7]
This bit indicates the comparison of AD
OUT (register 13h) to
both AD
RISE (register 14h) and ADFALL(register 15h). When
AD
OUT exceeds ADRISE, AD_CMP = 1. When ADOUT falls below
AD
FALL , AD_CMP = 0.
AD_INT [D6]
This bit is set when the AD_CMP bit [D7] changes state. If
the AD_SATEN [D5] bit is set, AD_INT bit [D6] may also be
used to indicate an overflow or underflow in AD
OUT (register
13h). This bit is cleared when ADC function register (12h) is
read, or when writing INT_CLR bit [D2] equal to one.
The AD_INT bit provides a flag indicating that the ADI
input has exceeded a threshold level, or indicates that an
overflow or underflow condition exists. Figure 28 shows
the AD_INT flag interrupt states.
Bit
AD_CMP
changes
state
Interrupt is set
AD_INT 1
Interrupt is reset
AD_INT 0
Read
register 12h
or
Write
CLR_INT = 1
AD_SAT = 0
AD_OF = 1
or
AD_UF = 1
and
AD_SAT
0 ⇒ 1
AD_SAT = 1
and
AD_OF
0 ⇒ 1
or
AD_UF
0 ⇒ 1
Figure 28 — ADC Interrupt State Diagram
AD_SATEN [D5]
This bit, when set, allows an underflow or overflow to gen-
erate an interrupt which sets the AD_INT bit [D6]. When
AD_SATEN = 1, an overflow or underflow condition in reg-
ister 13h will set the AD_INT bit.
AD_OF [D4]
This bit indicates an overflow condition in register 13h. This
bit is set to one whenever AD
OUT becomes ADOUT > F8h.
AD_UF [D3]
This bit indicates an underflow condition in register 13h.This
bit is set to one whenever AD
OUT becomes ADOUT < 08h.
INT_CLR [D2]
Writing a one to this bit automatically resets bit AD_INT to
zero. INT_CLR resets itself and will always read as zero.
AD_AUTO [D1]
When the AD_AUTO bit is high, the contents of the AD
OUT,
AD
RISE, and ADFALL registers are compared and used to control
the brightness of backlight bank #1. AD
OUT is compared with
two threshold values contained in registers AD
RISE and
AD
FALL. If ADOUT becomes greater than ADRISE, bank #1 will
change to the bank #1 target backlight setting of register
06h. If AD
OUT becomes less than ADFALL, bank #1 will change
to the bank #1 backlight setting from register 02h.
When the AD_AUTO bit is low, the comparison of AD
OUT to
AD
RISE and ADFALL is disabled so that bank #1 does not react
to changes in the value of AD
OUT, ADRISE, or ADFALL.
AD_EN [D0]
When the AD_EN bit is high, the ADC is activated and the
results of each conversion are stored in AD
OUT (register 13h).
The functions of the AD_AUTO and AD_EN bits are shown
in Table 22.



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