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SC174 датащи(PDF) 20 Page - Semtech Corporation |
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SC174 датащи(HTML) 20 Page - Semtech Corporation |
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20 / 27 page ![]() © 2010 Semtech Corporation Layout Guideline Since the SC174 has integrated switches, special consid- eration should be given to board layout. Let us use the schematic shown above as an example. The board level layout is illustrated in the following four layers. As shown on the top layer layout, U1 is the switching regulator SC174. C1 and C11 serve as the decoupling ca- pacitor for the buck converter power train. C11, with a value between 1nF and 10nF, is the high frequency fil- tering capacitor. It is recommended to put C1 and C11 as close as possible to the SC174 to get the best decou- pling performance, with C11 closest. L1 is the output filtering inductor. C2, C3 and C4 are the output filtering capacitors. C5 is the boostrap capacitor. Pin 10 (VDD) is the input bias power for the internal circuits. It is recom- mended to get the power from VIN through an RC filter- ing network consisted of R1, C6 and C10. The value of R1 can be between 3.01W and 10W and the capacitance of C10 should be above 1mF. C6, with a value of 1nF, is the high frequency filtering capacitor. The locations of C6 and C10 should be as close as possible to pins 9 and 10, with C6 closest, to get the best possible filtering result. R2 is the on-time programming resistor. R2 should be located as close as possible to pin 8 and it should return to analog ground. The EN/PSV pin is a tri-state pin. Pull EN/PSV high to enable the part with power save mode enabled. Connect EN/PSV to AGND to disable the switch- ing regulator. Leave EN/PSV floating to enable the IC in forced continuous conduction mode. Since there are two integrated MOSFETs inside the SC174 that will dissipate a lot of power, to help spread the heat out of the IC more efficiently, there is a thermal pad un- derneath the SC174 serving as a heat sink. To enlarge the heat sinking area, a large copper plane under the thermal pad as shown on the top layer is recommended. On inner layer 2, a large analog ground plane (AGND) on the right hand side is connected to the thermal pad un- derneath the SC174 using vias. Thus the heat generated inside the SC174 can be spread through the vias to the inner layers to expand the heat sinking area. 1 2 3 4 5 6 7 9 10 0 C5 C6 0 R6 C8 0 BST VIN LX PGND EN/PSV TON AGND VDD PGOOD FB C3 L1 C2 R3 R2 0 R1 C1 R4 R7 C9 0 C4 C7 EN/PSV VIN+ VIN- VO+ VO- U1 SC174 C10 C11 1 2 3 4 5 6 7 8 9 10 Schematic for layout illustration 20 SC174 |
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