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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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XIO2001IPNP датащи(PDF) 120 Page - Texas Instruments |
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XIO2001IPNP датащи(HTML) 120 Page - Texas Instruments |
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120 / 131 page  XIO2001 SCPS212D – MAY 2009 – REVISED JANUARY 2010 www.ti.com 7.9 PCI Bus Timing Requirements (1) over recommended operating conditions 33 MHz 66 MHz PARAMETER TEST CONDITION UNIT MIN MAX MIN MAX CL = 50 pF 11 CLK to shared signal valid propagation delay time CL = 30 pF 6 tpd ns CL = 50 pF 2 CLK to shared signal invalid propagation delay time CL = 30 pF 1 CL = 50 pF 2 tEnable time, high-impedance-to-active delay time tON ns from CLK CL = 30 pF 1 CL = 50 pF 28 Disable time, active-to-high-impedance delay time tOFF ns from CLK CL = 30 pF 14 Setup time on shared signals before CLK valid tsu 7 3 ns (rising edge) Hold time on shared signals after CLK valid (rising th 0 0 ns edge) (1) The PCI shared signals are AD31:0, C/BE[3:0], FRAME, TRDY, IRDY, STOP, IDSEL, DEVSEL, LOCK, SERIRQ, PAR, PERR, SERR, and CLKRUN. 7.10 PNP Thermal Characteristics (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT qJA Low-K JEDEC test board, 1s (single signal layer), no air 50.8 flow Junction-to-free-air thermal °C/W resistance High-K JEDEC test board, 2s2p (double signal layer, 24.9 double buried power plane), no air flow qJC Junction-to-case thermal resistance Cu cold plate measurement process 18.9 °C/W qJB Junction-to-board thermal EIA/JESD 51-8 14.6 °C/W resistance yJT Junction-to-top of package EIA/JESD 51-2 0.26 °C/W yJB Junction-to-board EIA/JESD 51-6 7.93 °C/W TA XIO2001PNP 0 70 Operating ambient temperature °C range XIO2001IPNP –40 85 TJ XIO2001PNP 0 105 Virtual junction temperature °C XIO2001IPNP –40 105 (1) For more details, refer to TI application note IC Package Thermal Metrics (SPRA953). 7.11 ZAJ Thermal Characteristics (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT qJA Low-K JEDEC test board, 1s (single signal layer), no air 82 flow Junction-to-free-air thermal °C/W resistance High-K JEDEC test board, 2s2p (double signal layer, 58.8 double buried power plane), no air flow qJC Junction-to-case thermal resistance Cu cold plate measurement process 19 °C/W qJB Junction-to-board thermal EIA/JESD 51-8 32 °C/W resistance yJT Junction-to-top of package EIA/JESD 51-2 0.5 °C/W yJB Junction-to-board EIA/JESD 51-6 30 °C/W TA XIO2001ZGU 0 70 Operating ambient temperature °C range XIO2001IZGU –40 85 (1) For more details, refer to TI application note IC Package Thermal Metrics (SPRA953). 120 Electrical Characteristics Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): XIO2001 |
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