FS6377 datasheet(16/24 Pages) ONSEMI

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FS6377

Table 12: DC Electrical Specifications (continued)

Mode and Frequency Select Inputs (ADDR, SEL_CD)

High-level input voltage

VIH

VDD = 5.5V

VDD = 3.6V

2.4

2.0

VDD +0.3

Low-level input voltage

VIL

VDD = 5.5V

VDD = 3.6V

VSS - 0.3

0.8

High-level input current

IIH

-1

µA

Low-level input current (pull-up)

IIL

-20

-36

-80

µA

Crystal Oscillator Feedback (XIN)

Threshold bias voltage

VTH

VDD = 5.5V

VDD = 3.6V

2.9

1.7

High-level input current

IIH

VDD = 5.5V

VDD = 5.5V, oscillator powered down

µA

Low-level input current

IIL

VDD = 5.5V

-25

-54

-75

µA

Crystal loading capacitance*

CL(xtal)

seen

external

crystal

connected to XIN and XOUT

Input loading capacitance*

CL(XIN)

As seen by an external clock driver on

XOUT; XIN unconnected

Crystal Oscillator Driver (XOUT)

High-level output source current

IOH

VDD = V(XIN) = 5.5V, VO = 0V

Low-level output sink current

IOL

VDD = 5.5V, V(XIN) = 0V, VO = 5.5V

-10

-21

-30

Clock Outputs (CLK_A, CLK_B, CLK_C, CLK_D)

High-level output source current

IOH

VO = 2.4V

-125

Low-level output sink current

IOL

VO = 0.4V

Output impedance

ZOH

ZOL

VO = 0.5VDD; output driving high

VO = 0.5VDD; output driving low

Ω

Tristate output current

-10

µA

Short circuit source current*

ISCH

VDD = 5.5V, VO = 0V; shorted for 30s,

max.

-150

Short circuit sink current*

ISCL

VDD = VO = 5.5V; shorted for 30s, max.

123

Unless otherwise stated, VDD = 5.0V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk (*) represent

nominal characterization data and are not currently production tested on any specific limits. Min. and max. characterization data are ± 3

σ from typical. Negative currents

indicate current flows out of the device.

Low Drive Current (mA)

High Drive Current (mA)

Voltage

(V)

Min.

Typ.

Max.

Voltage

(V)

Min.

Typ.

Max.

-87

-112

-150

0.2

0.5

-85

-110

-147

0.5

-83

-108

-144

0.7

1.5

-80

-104

-139

-74

-97

-131

1.2

2.5

-65

-88

-121

1.5

2.7

-61

-84

-116

1.7

-53

-77

-108

3.2

-48

-71

-102

2.2

3.5

-39

-62

-92

2.5

104

3.7

-32

-55

-85

2.7

108

-21

-44

-74

112

4.2

-13

-36

-65

3.5

117

4.5

-24

-52

119

4.7

-15

-43

4.5

120

-28

121

5.2

-11

5.5

123

5.5

Figure 9: CLK_A, CLK_B, CLK_C, CLK_D Clock Outputs

The data in this table represents nominal characterization data only.

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