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SC312XDP512F0MPVR датащи(PDF) 195 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 195 Page - Freescale Semiconductor, Inc |
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195 / 1348 page ![]() Chapter 6 XGATE (S12XGATEV2) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 195 6.3.1.5 XGATE Software Trigger Register (XGSWT) The eight software triggers of the XGATE module can be set and cleared through the XGATE software trigger register (Figure 6-7). The upper byte of this register, the software trigger mask, controls the write access to the lower byte, the software trigger bits. These bits can be set or cleared if a "1" is written to the associated mask in the same bus cycle. Read: Anytime Write: Anytime NOTE The XGATE channel IDs that are associated with the eight software triggers are determined on chip integration level. (see Section “Interrupts” of the Soc Guide) XGATE software triggers work like any peripheral interrupt. They can be used as XGATE requests as well as S12X_CPU interrupts. The target of the software trigger must be selected in the S12X_INT module. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R 00000000 XGSWT[7:0] W XGSWTM[7:0] Reset 0 0 0 0000000000000 Figure 6-7. XGATE Software Trigger Register (XGSWT) Table 6-5. XGSWT Field Descriptions Field Description 15–8 XGSWTM[7:0] Software Trigger Mask — These bits control the write access to the XGSWT bits. Each XGSWT bit can only be written if a "1" is written to the corresponding XGSWTM bit in the same access. Read: These bits will always read "0". Write: 0 Disable write access to the XGSWT in the same bus cycle 1 Enable write access to the corresponding XGSWT bit in the same bus cycle 7–0 XGSWT[7:0] Software Trigger Bits — These bits act as interrupt flags that are able to trigger XGATE software channels. They can only be set and cleared by software. Read: 0 No software trigger pending 1 Software trigger pending if the XGIE bit is set Write: 0 Clear Software Trigger 1 Set Software Trigger |
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