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SC312XDP512F0MPVR датащи(PDF) 149 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 149 Page - Freescale Semiconductor, Inc |
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149 / 1348 page ![]() Chapter 4 Analog-to-Digital Converter (ATD10B16CV4) Block Description MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 149 4.3.2.14 Port Data Register 0 (PORTAD0) The data port associated with the ATD is input-only. The port pins are shared with the analog A/D inputs AN[15:8]. Read: Anytime Write: Anytime, no effect The A/D input channels may be used for general-purpose digital input. 76543210 R PTAD15 PTAD14 PTAD13 PTAD12 PTAD11 PTAD10 PTAD9 PTAD8 W Reset 11111111 Pin Function AN15 AN14 AN13 AN12 AN11 AN10 AN9 AN8 = Unimplemented or Reserved Figure 4-16. Port Data Register 0 (PORTAD0) Table 4-25. PORTAD0 Field Descriptions Field Description 7:0 PTAD[15:8] A/D Channel x (ANx) Digital Input Bits— If the digital input buffer on the ANx pin is enabled (IENx = 1) or channel x is enabled as external trigger (ETRIGE = 1, ETRIGCH[3-0] = x, ETRIGSEL = 0) read returns the logic level on ANx pin (signal potentials not meeting VIL or VIH specifications will have an indeterminate value)). If the digital input buffers are disabled (IENx = 0) and channel x is not enabled as external trigger, read returns a “1”. Reset sets all PORTAD0 bits to “1”. |
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