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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC312XDP512F0MPVR датащи(PDF) 143 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 143 Page - Freescale Semiconductor, Inc |
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143 / 1348 page  Chapter 4 Analog-to-Digital Converter (ATD10B16CV4) Block Description MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 143 4.3.2.7 ATD Status Register 0 (ATDSTAT0) This read-only register contains the Sequence Complete Flag, overrun flags for external trigger and FIFO mode, and the conversion counter. Read: Anytime Write: Anytime (No effect on CC[3:0]) 76543210 R SCF 0 ETORF FIFOR CC3 CC2 CC1 CC0 W Reset 00000000 = Unimplemented or Reserved Figure 4-9. ATD Status Register 0 (ATDSTAT0) Table 4-18. ATDSTAT0 Field Descriptions Field Description 7 SCF Sequence Complete Flag — This flag is set upon completion of a conversion sequence. If conversion sequences are continuously performed (SCAN = 1), the flag is set after each one is completed. This flag is cleared when one of the following occurs: • Write “1” to SCF • Write to ATDCTL5 (a new conversion sequence is started) • If AFFC = 1 and read of a result register 0 Conversion sequence not completed 1 Conversion sequence has completed 5 ETORF External Trigger Overrun Flag —While in edge trigger mode (ETRIGLE = 0), if additional active edges are detected while a conversion sequence is in process the overrun flag is set. This flag is cleared when one of the following occurs: • Write “1” to ETORF • Write to ATDCTL0,1,2,3,4 (a conversion sequence is aborted) • Write to ATDCTL5 (a new conversion sequence is started) 0 No External trigger over run error has occurred 1 External trigger over run error has occurred |
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