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SC312XDP512F0MPVR датащи(PDF) 1105 Page - Freescale Semiconductor, Inc

номер детали SC312XDP512F0MPVR
подробное описание детали  HCS12X Microcontrollers
PDF  1348 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
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SC312XDP512F0MPVR датащи(HTML) 1105 Page - Freescale Semiconductor, Inc

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MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
1107
Chapter 27
512 Kbyte Flash Module (S12XFTX512K4V2)
27.1
Introduction
This document describes the FTX512K4 module that includes a 512K Kbyte Flash (nonvolatile) memory.
The Flash memory may be read as either bytes, aligned words or misaligned words. Read access time is
one bus cycle for bytes and aligned words, and two bus cycles for misaligned words.
The Flash memory is ideal for program and data storage for single-supply applications allowing for field
reprogramming without requiring external voltage sources for program or erase. Program and erase
functions are controlled by a command driven interface. The Flash module supports both block erase and
sector erase. An erased bit reads 1 and a programmed bit reads 0. The high voltage required to program
and erase the Flash memory is generated internally. It is not possible to read from a Flash block while it is
being erased or programmed.
CAUTION
A Flash word must be in the erased state before being programmed.
Cumulative programming of bits within a Flash word is not allowed.
27.1.1
Glossary
Command Write Sequence — A three-step MCU instruction sequence to execute built-in algorithms
(including program and erase) on the Flash memory.
Multiple-Input Signature Register (MISR) — A Multiple-Input Signature Register is an output
response analyzer implemented using a linear feedback shift-register (LFSR). A 16-bit MISR is used to
compress data and generate a signature that is particular to the data read from a Flash block.
27.1.2
Features
•
512 Kbytes of Flash memory comprised of four 128 Kbyte blocks with each block divided into
128 sectors of 1024 bytes
•
Automated program and erase algorithm
•
Interrupts on Flash command completion, command buffer empty
•
Fast sector erase and word program operation
•
2-stage command pipeline for faster multi-word program times
•
Sector erase abort feature for critical interrupt response
•
Flexible protection scheme to prevent accidental program or erase
•
Single power supply for all Flash operations including program and erase



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