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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC312XDP512F0MPVR датащи(PDF) 1043 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 1043 Page - Freescale Semiconductor, Inc |
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1043 / 1348 page  Chapter 25 2 Kbyte EEPROM Module (S12XEETX2KV1) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 1045 All bits read 0 and are not writable. 25.3.2.4 EEPROM Configuration Register (ECNFG) The ECNFG register enables the EEPROM interrupts. CBEIE and CCIE bits are readable and writable while all remaining bits read 0 and are not writable. 76543210 R 00000000 W Reset 00000000 = Unimplemented or Reserved Figure 25-6. RESERVED2 76543210 R CBEIE CCIE 000000 W Reset 00000000 = Unimplemented or Reserved Figure 25-7. EEPROM Configuration Register (ECNFG) Table 25-3. ECNFG Field Descriptions Field Description 7 CBEIE Command Buffer Empty Interrupt Enable — The CBEIE bit enables an interrupt in case of an empty command buffer in the EEPROM module. 0 Command Buffer Empty interrupt disabled. 1 An interrupt will be requested whenever the CBEIF flag (see Section 25.3.2.6, “EEPROM Status Register (ESTAT)”) is set. 6 CCIE Command Complete Interrupt Enable — The CCIE bit enables an interrupt in case all commands have been completed in the EEPROM module. 0 Command Complete interrupt disabled. 1 An interrupt will be requested whenever the CCIF flag (see Section 25.3.2.6, “EEPROM Status Register (ESTAT)”) is set. |
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