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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC312XDP512F0MPVR датащи(PDF) 788 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 788 Page - Freescale Semiconductor, Inc |
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788 / 1348 page  Chapter 21 External Bus Interface (S12XEBIV2) MC9S12XDP512 Data Sheet, Rev. 2.21 790 Freescale Semiconductor 21.3 Memory Map and Register Definition This section provides a detailed description of all registers accessible in the XEBI. 21.3.1 Module Memory Map The registers associated with the XEBI block are shown in Figure 21-2. 21.3.2 Register Descriptions The following sub-sections provide a detailed description of each register and the individual register bits. All control bits can be written anytime, but this may have no effect on the related function in certain operating modes. This allows specific configurations to be set up before changing into the target operating mode. NOTE Depending on the operating mode an available function may be enabled, disabled or depend on the control register bit. Reading the register bits will reflect the status of related function only if the current operating mode allows user control. Please refer the individual bit descriptions. Register Name Bit 7 6 5 4 3 2 1 Bit 0 EBICTL0 R ITHRS 0 HDBE ASIZ4 ASIZ3 ASIZ2 ASIZ1 ASIZ0 W EBICTL1 R EWAITE 0000 EXSTR2 EXSTR1 EXSTR0 W = Unimplemented or Reserved Figure 21-2. XEBI Register Summary |
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