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SC312XDP512F0MPVR датащи(PDF) 602 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 602 Page - Freescale Semiconductor, Inc |
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602 / 1348 page ![]() Chapter 16 Interrupt (S12XINTV1) MC9S12XDP512 Data Sheet, Rev. 2.21 602 Freescale Semiconductor 16.3.1.2 XGATE Interrupt Priority Configuration Register (INT_XGPRIO) Read: Anytime Write: Anytime Address: 0x0126 76543210 R 00000 XILVL[2:0] W Reset 00000001 = Unimplemented or Reserved Figure 16-4. XGATE Interrupt Priority Configuration Register (INT_XGPRIO) Table 16-3. INT_XGPRIO Field Descriptions Field Description 2–0 XILVL[2:0] XGATE Interrupt Priority Level — The XILVL[2:0] bits configure the shared interrupt level of the DMA interrupts coming from the XGATE module. Out of reset the priority is set to the lowest active level (“1”). Table 16-4. XGATE Interrupt Priority Levels Priority XILVL2 XILVL1 XILVL0 Meaning 0 0 0 Interrupt request is disabled low 0 0 1 Priority level 1 0 1 0 Priority level 2 0 1 1 Priority level 3 1 0 0 Priority level 4 1 0 1 Priority level 5 1 1 0 Priority level 6 high 1 1 1 Priority level 7 |
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