SC312XDP512F0MPVR datasheet(460/1348 Pages) FREESCALE

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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)

MC9S12XDP512 Data Sheet, Rev. 2.21

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Freescale Semiconductor

ﬁeld of the CAN frame, is received into the next available RxBG. If the MSCAN receives an invalid

message in its RxBG (wrong identiﬁer, transmission errors, etc.) the actual contents of the buffer will be

over-written by the next message. The buffer will then not be shifted into the FIFO.

When the MSCAN module is transmitting, the MSCAN receives its own transmitted messages into the

background receive buffer, RxBG, but does not shift it into the receiver FIFO, generate a receive interrupt,

or acknowledge its own messages on the CAN bus. The exception to this rule is in loopback mode (see

Section 10.3.2.2, “MSCAN Control Register 1 (CANCTL1)”) where the MSCAN treats its own messages

exactly like all other incoming messages. The MSCAN receives its own transmitted messages in the event

that it loses arbitration. If arbitration is lost, the MSCAN must be prepared to become a receiver.

An overrun condition occurs when all receive message buffers in the FIFO are ﬁlled with correctly

received messages with accepted identiﬁers and another message is correctly received from the CAN bus

with an accepted identiﬁer. The latter message is discarded and an error interrupt with overrun indication

is generated if enabled (see Section 10.4.7.5, “Error Interrupt”). The MSCAN remains able to transmit

messages while the receiver FIFO being ﬁlled, but all incoming messages are discarded. As soon as a

receive buffer in the FIFO is available again, new valid messages will be accepted.

10.4.3

Identiﬁer Acceptance Filter

The MSCAN identiﬁer acceptance registers (see Section 10.3.2.12, “MSCAN Identiﬁer Acceptance

Control Register (CANIDAC)”) deﬁne the acceptable patterns of the standard or extended identiﬁer

(ID[10:0] or ID[28:0]). Any of these bits can be marked ‘don’t care’ in the MSCAN identiﬁer mask

registers (see Section 10.3.2.18, “MSCAN Identiﬁer Mask Registers (CANIDMR0–CANIDMR7)”).

A ﬁlter hit is indicated to the application software by a set receive buffer full ﬂag (RXF = 1) and three bits

in the CANIDAC register (see Section 10.3.2.12, “MSCAN Identiﬁer Acceptance Control Register

(CANIDAC)”). These identiﬁer hit ﬂags (IDHIT[2:0]) clearly identify the ﬁlter section that caused the

acceptance. They simplify the application software’s task to identify the cause of the receiver interrupt. If

more than one hit occurs (two or more ﬁlters match), the lower hit has priority.

A very ﬂexible programmable generic identiﬁer acceptance ﬁlter has been introduced to reduce the CPU

interrupt loading. The ﬁlter is programmable to operate in four different modes (see Bosch CAN 2.0A/B

protocol speciﬁcation):

•

Two identiﬁer acceptance ﬁlters, each to be applied to:

— The full 29 bits of the extended identiﬁer and to the following bits of the CAN 2.0B frame:

– Remote transmission request (RTR)

– Identiﬁer extension (IDE)

– Substitute remote request (SRR)

— The 11 bits of the standard identiﬁer plus the RTR and IDE bits of the CAN 2.0A/B messages1.

This mode implements two ﬁlters for a full length CAN 2.0B compliant extended identiﬁer.

Figure 10-40 shows how the ﬁrst 32-bit ﬁlter bank (CANIDAR0–CANIDAR3,

CANIDMR0–CANIDMR3) produces a ﬁlter 0 hit. Similarly, the second ﬁlter bank

(CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7) produces a ﬁlter 1 hit.

1.Although this mode can be used for standard identifiers, it is recommended to use the four or eight identifier acceptance

filters for standard identifiers

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