SC312XDP512F0MPVR datasheet(363/1348 Pages) FREESCALE

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MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

363

Chapter 8

Pulse-Width Modulator (S12PWM8B8CV1)

8.1

Introduction

The PWM deﬁnition is based on the HC12 PWM deﬁnitions. It contains the basic features from the HC11

with some of the enhancements incorporated on the HC12: center aligned output mode and four available

clock sources.The PWM module has eight channels with independent control of left and center aligned

outputs on each channel.

Each of the eight channels has a programmable period and duty cycle as well as a dedicated counter. A

ﬂexible clock select scheme allows a total of four different clock sources to be used with the counters. Each

of the modulators can create independent continuous waveforms with software-selectable duty rates from

0% to 100%. The PWM outputs can be programmed as left aligned outputs or center aligned outputs.

8.1.1

Features

The PWM block includes these distinctive features:

•

Eight independent PWM channels with programmable period and duty cycle

•

Dedicated counter for each PWM channel

•

Programmable PWM enable/disable for each channel

•

Software selection of PWM duty pulse polarity for each channel

•

Period and duty cycle are double buffered. Change takes effect when the end of the effective period

is reached (PWM counter reaches zero) or when the channel is disabled.

•

Programmable center or left aligned outputs on individual channels

•

Eight 8-bit channel or four 16-bit channel PWM resolution

•

Four clock sources (A, B, SA, and SB) provide for a wide range of frequencies

•

Programmable clock select logic

•

Emergency shutdown

8.1.2

Modes of Operation

There is a software programmable option for low power consumption in wait mode that disables the input

clock to the prescaler.

In freeze mode there is a software programmable option to disable the input clock to the prescaler. This is

useful for emulation.

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