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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC312XDP512F0MPVR датащи(PDF) 231 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 231 Page - Freescale Semiconductor, Inc |
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231 / 1348 page  Chapter 6 XGATE (S12XGATEV2) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 231 Operation !(RS1[w:0] ^ RD[w+o:o]) ⇒ RD[w+o:o]; w = (RS2[7:4]) o = (RS2[3:0]) Extracts w+1 bits from register RS1 starting at position 0, performs an XNOR with RD[w+o:o] and writes the bits back io RD. The remaining bits in RD are not affected. If (o+w) > 15 the upper bits are ignored. Using R0 as a RS1, this command can be used to toggle bits. CCR Effects Code and CPU Cycles BFINSX Bit Field Insert and XNOR BFINSX NZ V C ∆∆ 0— N: Set if bit 15 of the result is set; cleared otherwise. Z: Set if the result is $0000; cleared otherwise. V: 0; cleared. C: Not affected. Source Form Address Mode Machine Code Cycles BFINSX RD, RS1, RS2 TRI 0 1 1 1 1 RD RS1 RS2 1 1 P W4 O4 15 0 2 5 W4=3, O4=2 15 0 3 Bit Field Insert XNOR RS2 RD RS1 15 0 3 74 |
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