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ADT7483AARQZ-R7 датащи(PDF) 6 Page - ON Semiconductor |
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ADT7483AARQZ-R7 датащи(HTML) 6 Page - ON Semiconductor |
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6 / 24 page ![]() ADT7483A Rev. 1 | Page 6 of 24 | www.onsemi.com PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VDD D1+ D1– GND ALERT/THERM2 THERM 1 2 3 4 5 6 7 8 NC = NO CONNECT 16 15 14 13 12 11 10 9 NC ADD1 SCLK SDATA NC NC NC D2– D2+ ADD0 TOP VIEW (Not to Scale) ADT7483A Figure 3.16-Lead QSOP Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 ADD1 Address 1 Pin. Tri-state input to set the SMBus address. 2 VDD Positive Supply, 3 V to 3.6 V. 3 D1+ Positive Connection. Connects to the first remote temperature sensor. 4 D1− Negative Connection. Connects to the first remote temperature sensor. 5 THERM Open-Drain Output. Turns a fan on/off, or throttles a CPU clock in the event of an overtemperature condition. 6 GND Supply Ground Connection. 7 NC No Connect. 8 NC No Connect. 9 NC No Connect. 10 NC No Connect. 11 D2− Negative Connection. Connects to the second remote temperature sensor. 12 D2+ Positive Connection. Connects to the second remote temperature sensor. 13 ALERT/THERM2 Open-Drain Logic Output. Used as interrupt or SMBus alert. This may also be configured as a second THERM output. Requires a pull-up resistor. 14 SDATA Logic Input/Output, SMBus Serial Data. Open-drain output. Requires a pull-up resistor. 15 SCLK Logic Input, SMBus Serial Clock. Requires a pull-up resistor. 16 ADD0 Address 0 Pin. Tri-state input to set the SMBus address. |
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