ADP4100

http://onsemi.com

5

PIN ASSIGNMENT

Pin No.

Pin Name

Description

1

NC

No Connect

2

NC

No Connect

3

NC

No Connect

4

NC

No Connect

5

EN

Power Supply Enable Input. Pulling this pin to GND disables the PWM outputs and pulls the PWRGD output low.

6

GND

Ground. All internal biasing and the logic output signals of the device are referenced to this ground.

7

PSI_SET

This input sets the number of phases enabled during PSI. Pulling this input high means that two phases,

Phases 1 and Phase 4 (when 6 phases are enabled during normal operation), are enabled during PSI.

Grounding this pin means only Phase 1 is enabled during PSI.

8

LLSET

Output Loadline Programming Input. This pin can be connected directly to CSCOMP or it can be connected to

the centerpoint of a resistor divider between CSCOMP and CSREF. Connecting LLSET to CSREF disables

the loadline.

9

IMON

Total Current Output Pin.

10

TTSENSE

VR Temperature Sense Input. An NTC thermistor between this pin and GND is used to remotely sense the

temperature at the desired thermal monitoring point.

11

VRHOT

VR HOT Output. Open drain output that signals when the temperature at the monitoring point connected to

TTSENSE exceeds the VRHOT temperature threshold.

12

IREF

IILIMFS, and ITH(X).

13

RT

Frequency Setting Resistor Input. An external resistor connected between this pin and GND sets the oscillator

frequency of the device.

14

RAMPADJ

PWM Ramp Current Input. An external resistor from the converter input voltage to this pin sets the internal

PWM ramp.

15

TRDET

Transient Detect. This output is asserted low whenever a load release is detected

16

FBRTN

Feedback Return. VID DAC and error amplifier reference for remote sensing of the output voltage.

17

COMP

Error Amplifier Output and Compensation Point.

18

FB

Feedback Input. Error amplifier input for remote sensing of the output voltage. An external resistor between

this pin and the output voltage sets the no load offset point.

19

CSREF

Current Sense Reference Voltage Input. The voltage on this pin is used as the reference for the current sense

amplifier and the power−good and crowbar functions. This pin should be connected to the common point of

the output inductors.

20

CSSUM

Current Sense Summing Node. External resistors from each switch node to this pin sum the average inductor

currents together to measure the total output current.

21

CSCOMP

Current Sense Compensation Point. A resistor and capacitor from this pin to CSSUM determines the gain of

the current sense amplifier and the positioning loop response time.

22

ILIMFS

Current Sense and Limit Scaling Pin. An external resistor from this pin to CSCOMP sets the internal current

sensing signal for current−limit and IMON.

23

ODN

Output Disable Logic Output for PSI operation. This pin is actively pulled low when PSI is low, otherwise it

functions in the same way as OD1.

24

OD1

UVLO threshold to signal to the Driver IC that the driver high−side and low−side outputs should go low.

25 to 30

SW6 to

SW1

Current Balance Inputs. Inputs for measuring the current level in each phase. The SW pins of unused phases

should be left open.

31 to 36

PWM6 to

PWM1

Logic−Level PWM Outputs. Each output is connected to the input of an external MOSFET driver such as the

etc. This means the ADP4100 can be setup to operate as a 1− 2−, 3−, 4−, 5−, or 6−phase controller.

37

Supply Voltage for the Device. A 340 W resistor should be placed between the 12 V system supply and the

38 to 45

VID7 to

VID0

Voltage Identification DAC Inputs. These eight pins are pulled down to GND, providing a logic zero if left open.

When in normal operation mode, the DAC output programs the FB regulation voltage from 0.375 V to 1.6 V.

46

PSI

Power State Indicator. Pulling this pin low places the controller in lower power state operation.

47

PWRGD

Power−Good Output. Open−drain output that signals when the output voltage is outside of the proper

operating range.

48

VCC3

3.3 V Power Supply Output. A capacitor from this pin to ground provided decoupling for the interval 3.3V LDO.