ADP3293 datasheet(13/30 Pages) ONSEMI

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ADP3293

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Power State Indicator

The PSI pin is used as an input to determine the operating

power state of the load. If this pin is pulled low, the controller

knows the load is in a low power state and it takes the ODN

signal low, which can be used to disable phases for increased

efficiency.

The sequencing into and out of low−power operation is

maintained to minimize output voltage deviations as well as

providing full−power load transients immediately following

exit from a low−power state.

One additional feature of the ADP3293 is the internal

current limit threshold is changed when PSI is pulled low.

The current limit threshold is reduced by 1/N such that the

same per phase average current limit is maintained to protect

the components in the system.

Figure 7. PSI Mode Transition Waveform (Io = 25A)

1-Vo, 2-PSI, 3-COMP, 4-TRDET, D0~D2-PWM1~3

Output Crowbar

To protect the load and output components of the supply,

the PWM outputs are driven low, which turns on the

low−side MOSFETs when the output voltage exceeds the

upper crowbar threshold. This crowbar action stops once the

output voltage falls below the release threshold of

approximately 375 mV.

Turning on the low−side MOSFETs pulls down the output

as the reverse current builds up in the inductors. If the output

overvoltage is due to a short in the high−side MOSFET, this

action current limits the input supply or blows its fuse,

protecting the microprocessor from being destroyed.

Output Enable and UVLO

For the ADP3293 to begin switching, the input supply

current to the controller must be higher than the UVLO

threshold and the EN pin must be higher than its 0.8 V

threshold. This initiates a system startup sequence. If either

UVLO or EN is less than their respective thresholds, the

ADP3293 is disabled. This holds the PWM outputs at

ground, shorts the DELAY capacitor to ground, and the

forces PWRGD and OD signals low.

In the application circuit, the OD pin should be connected

to the OD input of the external driver for the phase that is

always on while the ODN pin should be connected to the OD

input on the external drivers of the phases that are shut off

during low−power operation. Grounding OD and ODN

disable the drivers such that both DRVH and DRVL are

grounded. This feature is important in preventing the

discharge of the output capacitors when the controller is shut

off. If the driver outputs are not disabled, a negative voltage

can be generated during output due to the high current

discharge of the output capacitors through the inductors.

Thermal Monitoring

The ADP3293 includes a thermal monitoring circuit to

detect when a point on the VR has exceeded a user−defined

temperature. The thermal monitoring circuit requires an

NTC thermistor to be placed between TTSNS and GND.

A fixed current of 120

mA is sourced out of the TTSNS pin

and into the thermistor. The current source is internally

limited to 5.0 V. An internal circuit compares the TTSNS

voltage to a 0.81 V threshold, and outputs an open−drain

signal at the VRHOT output. Once the voltage on the

TTSNS pin drops below its threshold, the open−drain output

asserts high to signal the system that an overtemperature

event has occurred. Because the TTSNS voltage changes

slowly with respect to time, 55 mV of hysteresis is built into

this comparator. The thermal monitoring circuitry does not

depend on EN and is active when UVLO is above its

threshold. When UVLO is below its threshold, VRHOT is

forced low.

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