TUSB9260

www.ti.com

SLLS962A – DECEMBER 2009 – REVISED JULY 2010

Table 5-7. Power and Ground Signals

TERMINAL

I/O

DESCRIPTION

PIN

NAME

NO.

VDDR18

48, 62

PWR

1.8-V power rail

VDDA18

37

PWR

1.8-V analog power rail

1, 12,

19, 32,

38, 41,

VDD

44, 47,

PWR

1.1-V power rail

49, 55,

58, 61,

63, 64

7, 24,

VDD33

PWR

3.3-V power rail

50, 51

VDDA33

34

PWR

3.3-V analog power rail

Oscillator ground. If using a crystal, this should not be connected to PCB ground plane. If

VSSOSC

53

PWR

using an oscillator, this should be connected to PCB ground. See the Clock Source

Requirements section for more details.

VSS

65

PWR

Ground - Thermal Pad

Copyright © 2009–2010, Texas Instruments Incorporated

SIGNAL DESCRIPTIONS

15

Submit Documentation Feedback

Product Folder Link(s): TUSB9260