PIC16F631-ESLASHML datasheet(86/306 Pages) MICROCHIP

86 / 306 page

PIC16F631/677/685/687/689/690

DS41262E-page 84

6.0

TIMER1 MODULE WITH GATE

CONTROL

The Timer1 module is a 16-bit timer/counter with the

following features:

• 16-bit timer/counter register pair (TMR1H:TMR1L)

• Programmable internal or external clock source

• 3-bit prescaler

• Optional LP oscillator

• Synchronous or asynchronous operation

• Timer1 gate (count enable) via comparator or

T1G pin

• Interrupt on overflow

• Wake-up on overflow (external clock,

Asynchronous mode only)

• Time base for the Capture/Compare function

(PIC16F685/PIC16F690 only)

• Special Event Trigger (with ECCP)

(PIC16F685/PIC16F690 only)

• Comparator output synchronization to Timer1

clock

Figure 6-1 is a block diagram of the Timer1 module.

6.1

Timer1 Operation

The Timer1 module is a 16-bit incrementing counter

which is accessed through the TMR1H:TMR1L register

pair. Writes to TMR1H or TMR1L directly update the

counter.

When used with an internal clock source, the module is

a timer. When used with an external clock source, the

module can be used as either a timer or counter.

6.2

Clock Source Selection

The TMR1CS bit of the T1CON register is used to select

the clock source. When TMR1CS = 0, the clock source

is FOSC/4. When TMR1CS = 1, the clock source is

supplied externally.

FIGURE 6-1:

TIMER1 BLOCK DIAGRAM

Clock

Source

T1OSCEN

FOSC

Mode

TMR1CS

FOSC/4

xxx

T1CKI pin

xxx

T1LPOSC

LP or

INTOSCIO

TMR1H

TMR1L

Oscillator

T1SYNC

T1CKPS<1:0>

Prescaler

1, 2, 4, 8

Synchronize(3)

det

Synchronized

clock input

Set flag bit

TMR1IF on

Overflow

TMR1(2)

TMR1GE

TMR1ON

T1OSCEN

SYNCC2OUT(4)

T1GSS

T1GINV

To C2 Comparator Module

Timer1 Clock

TMR1CS

OSC2/T1G

OSC1/T1CKI

Note 1:

ST Buffer is low power type when using LP oscillator, or high speed type when using T1CKI.

Timer1 register increments on rising edge.

Synchronize does not operate while in Sleep.

SYNCC2OUT is synchronized when the C2SYNC bit of the

CM2CON1 register is set.

(1)

INTOSC

Without CLKOUT

FOSC/4

Internal

Clock

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