PIC12F1822-ISLASHMF datasheet(299/398 Pages) MICROCHIP

299 / 398 page

 2010 Microchip Technology Inc.

Preliminary

DS41413A-page 299

PIC12F/LF1822/16F/LF1823

25.3.4

BREAK CHARACTER SEQUENCE

The EUSART module has the capability of sending the

special Break character sequences that are required by

the LIN bus standard. A Break character consists of a

Start bit, followed by 12 ‘0’ bits and a Stop bit.

To send a Break character, set the SENDB and TXEN

bits of the TXSTA register. The Break character trans-

mission is then initiated by a write to the TXREG. The

value of data written to TXREG will be ignored and all

‘0’s will be transmitted.

The SENDB bit is automatically reset by hardware after

the corresponding Stop bit is sent. This allows the user

to preload the transmit FIFO with the next transmit byte

following the Break character (typically, the Sync

character in the LIN specification).

The TRMT bit of the TXSTA register indicates when the

transmit operation is active or Idle, just as it does during

normal transmission. See Figure 25-9 for the timing of

the Break character sequence.

25.3.4.1

Break and Sync Transmit Sequence

The following sequence will start a message frame

header made up of a Break, followed by an auto-baud

Sync byte. This sequence is typical of a LIN bus

master.

Configure the EUSART for the desired mode.

Set the TXEN and SENDB bits to enable the

Break sequence.

Load the TXREG with a dummy character to

initiate transmission (the value is ignored).

Write ‘55h’ to TXREG to load the Sync character

into the transmit FIFO buffer.

After the Break has been sent, the SENDB bit is

reset by hardware and the Sync character is

then transmitted.

When the TXREG becomes empty, as indicated by the

TXIF, the next data byte can be written to TXREG.

25.3.5

RECEIVING A BREAK CHARACTER

The Enhanced EUSART module can receive a Break

character in two ways.

The first method to detect a Break character uses the

FERR bit of the RCSTA register and the Received data

as indicated by RCREG. The Baud Rate Generator is

assumed to have been initialized to the expected baud

rate.

A Break character has been received when;

• RCIF bit is set

• FERR bit is set

• RCREG = 00h

The second method uses the Auto-Wake-up feature

described in Section 25.3.3 “Auto-Wake-up on

Break”. By enabling this feature, the EUSART will

sample the next two transitions on RX/DT, cause an

RCIF interrupt, and receive the next data byte followed

by another interrupt.

Note that following a Break character, the user will

typically want to enable the Auto-Baud Detect feature.

For both methods, the user can set the ABDEN bit of

the BAUDCON register before placing the EUSART in

Sleep mode.

FIGURE 25-9:

SEND BREAK CHARACTER SEQUENCE

Write to TXREG

Dummy Write

BRG Output

(Shift Clock)

Start bit

bit 0

bit 1

bit 11

Stop bit

Break

TXIF bit

(Transmit

Interrupt Flag)

TX (pin)

TRMT bit

(Transmit Shift

Empty Flag)

SENDB

(send Break

control bit)

SENDB Sampled Here

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