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PIC12F1822-I/MF датащи(PDF) 256 Page - Microchip Technology |
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PIC12F1822-I/MF датащи(HTML) 256 Page - Microchip Technology |
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256 / 398 page ![]() PIC12F/LF1822/16F/LF1823 DS41413A-page 256 Preliminary 2010 Microchip Technology Inc. 24.5.8 GENERAL CALL ADDRESS SUPPORT The addressing procedure for the I2C bus is such that the first byte after the Start condition usually deter- mines which device will be the slave addressed by the master device. The exception is the general call address which can address all devices. When this address is used, all devices should, in theory, respond with an acknowledge. The general call address is a reserved address in the I2C protocol, defined as address 0x00. When the GCEN bit of the SSP1CON2 register is set, the slave module will automatically ACK the reception of this address regardless of the value stored in SSP1ADD. After the slave clocks in an address of all zeros with the R/W bit clear, an interrupt is generated and slave software can read SSP1BUF and respond. Figure 24-23 shows a general call reception sequence. In 10-bit Address mode, the UA bit will not be set on the reception of the general call address. The slave will prepare to receive the second byte as data, just as it would in 7-bit mode. If the AHEN bit of the SSP1CON3 register is set, just as with any other address reception, the slave hard- ware will stretch the clock after the 8th falling edge of SCL. The slave must then set its ACKDT value and release the clock with communication progressing as it would normally. FIGURE 24-24: SLAVE MODE GENERAL CALL ADDRESS SEQUENCE 24.5.9 SSP1 MASK REGISTER An SSP1 Mask (SSP1MSK) register (Register 24-5) is available in I2C Slave mode as a mask for the value held in the SSP1SR register during an address comparison operation. A zero (‘0’) bit in the SSP1MSK register has the effect of making the corresponding bit of the received address a “don’t care”. This register is reset to all ‘1’s upon any Reset condition and, therefore, has no effect on standard SSP1 operation until written with a mask value. The SSP1 Mask register is active during: • 7-bit Address mode: address compare of A<7:1>. • 10-bit Address mode: address compare of A<7:0> only. The SSP1 mask has no effect during the reception of the first (high) byte of the address. SDA SCL S SSP1IF BF (SSP1STAT<0>) Cleared by software SSP1BUF is read R/W = 0 ACK General Call Address Address is compared to General Call Address Receiving Data ACK 12 3 4 5 6 7 8 9 1 2 3 45 67 8 9 D7 D6 D5 D4 D3 D2 D1 D0 after ACK, set interrupt GCEN (SSP1CON2<7>) ’1’ |
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