PIC12F1822-ISLASHMF datasheet(249/398 Pages) MICROCHIP

249 / 398 page

 2010 Microchip Technology Inc.

Preliminary

DS41413A-page 249

PIC12F/LF1822/16F/LF1823

24.5.3.3

7-bit Transmission with Address

Hold Enabled

Setting the AHEN bit of the SSP1CON3 register

enables additional clock stretching and interrupt gen-

eration after the 8th falling edge of a received match-

ing address. Once a matching address has been

clocked in, CKP is cleared and the SSP1IF interrupt is

set.

Figure 24-18 displays a standard waveform of a 7-bit

Address Slave Transmission with AHEN enabled.

Bus starts Idle.

Master sends Start condition; the S bit of

SSP1STAT is set; SSP1IF is set if inter-

rupt-on-Start detect is enabled.

Master sends matching address with R/W bit

set. After the 8th falling edge of the SCL line the

CKP bit is cleared and SSP1IF interrupt is gen-

erated.

Slave software clears SSP1IF.

Slave software reads ACKTIM bit of SSP1CON3

Slave reads the address value from the

SSP1BUF register clearing the BF bit.

Slave software decides from this information if it

wishes to ACK or not ACK and sets ACKDT bit

of the SSP1CON2 register accordingly.

Slave sets the CKP bit releasing SCL.

Master clocks in the ACK value from the slave.

10. Slave hardware automatically clears the CKP bit

and sets SSP1IF after the ACK if the R/W bit is

set.

11. Slave software clears SSP1IF.

12. Slave loads value to transmit to the master into

SSP1BUF setting the BF bit.

13. Slave sets CKP bit releasing the clock.

14. Master clocks out the data from the slave and

sends an ACK value on the 9th SCL pulse.

15. Slave hardware copies the ACK value into the

ACKSTAT bit of the SSP1CON2 register.

16. Steps 10-15 are repeated for each byte transmit-

ted to the master from the slave.

17. If the master sends a not ACK the slave

releases the bus, allowing the master to send a

Stop and end the communication.

Note: SSP1BUF cannot be loaded until after the

ACK.

Note: Master must send a not ACK on the last byte

to ensure that the slave releases the SCL

line to receive a Stop.

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