HT68F03 datasheet(77/139 Pages) HOLTEK

77 / 139 page

HT66F03/HT66F04/HT68F03/HT68F04

Rev. 1.00

April 16, 2010

If the TM is in the Compare Match Output Mode then the TM output pin will be reset to its initial

condition, as specified by the T2AOC or T2BOC bit, when the T2ON bit changes from low to high.

Bit 2~0

T2RP2~T2RP0: TM2 CCRP 3-bit register, compared with the TM2 Counter bit 9~bit 7

Comparator P Match Period

000: 1024 TM2 clocks

001: 128 TM2 clocks

010: 256 TM2 clocks

011: 384 TM2 clocks

100: 512 TM2 clocks

101: 640 TM2 clocks

110: 768 TM2 clocks

111: 896 TM2 clocks

These three bits are used to setup the value on the internal CCRP 3-bit register, which are then

compared with the internal counter

¢s highest three bits. The result of this comparison can be

selected to clear the internal counter if the T2CCLR bit is set to zero. Setting the T2CCLR bit to

zero ensures that a compare match with the CCRP values will reset the internal counter. As the

CCRP bits are only compared with the highest three counter bits, the compare values exist in 128

clock cycle multiples. Clearing all three bits to zero is in effect allowing the counter to overflow at

its maximum value.

¨ TM2C1 Register

Bit

76543210

Name

T2AM1

T2AM0

T2AIO1

T2AIO0

T2AOC

T2APOL

T2CDN

T2CCLR

R/W

POR

00000000

Bit 7~6

T2AM1~T2AM0: Select TM2 CCRA Operating Mode

00: Compare Match Output Mode

01: Capture Input Mode

10: PWM Mode or Single Pulse Output Mode

11: Timer/Counter Mode

These bits setup the required operating mode for the TM. To ensure reliable operation the TM

should be switched off before any changes are made to the T2AM1 and T2AM0 bits. In the

Timer/Counter Mode, the TM output pin control must be disabled.

Bit 5~4

T2AIO1~T2AIO0: Select TP2A output function

Compare Match Output Mode

00: No change

01: Output low

10: Output high

11: Toggle output

PWM Mode/ Single Pulse Output Mode

00: Force inactive state

01: Force active state

10: PWM output

11: Single pulse output

Capture Input Mode

00: Input capture at rising edge of TP2A

01: Input capture at falling edge of TP2A

10: Input capture at falling/rising edge of TP2A

11: Input capture disabled

Timer/counter Mode

Unused

These two bits are used to determine how the TM output pin changes state when a certain

condition is reached. The function that these bits select depends upon in which mode the TM is

running.

HT68F03 датащи(PDF) 77 Page - Holtek Semiconductor Inc

HT68F03 датащи(HTML) 77 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL