ADP1882ARMZ-1.0-R7 datasheet(28/40 Pages) AD

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ADP1882/ADP1883

Rev. 0 | Page 28 of 40

THERMAL CONSIDERATIONS

The ADP1882/ADP1883 are used for dc-to-dc, step down, high

current applications that have an on-board controller and on-board

MOSFET drivers. Because applications may require up to 20 A

of load current delivery and be subjected to high ambient

temperature surroundings, the selection of external upper-side

and lower-side MOSFETs must be associated with careful thermal

consideration to not exceed the maximum allowable junction

temperature of 125°C. To avoid permanent or irreparable damage

if the junction temperature reaches or exceeds 155°C, the part

enters thermal shutdown, turning off both external MOSFETs,

and does not reenable until the junction temperature cools to

140°C (see the Thermal Shutdown section).

The maximum junction temperature allowed for the ADP1882/

ADP1883 ICs is 125°C. This means that the sum of the ambient

temperature (TA) and the rise in package temperature (TR), which

is caused by the thermal impedance of the package and the internal

power dissipation, should not exceed 125°C, as dictated by the

following expression:

TJ = TR × TA

where:

TA is the ambient temperature.

TJ is the maximum junction temperature.

TR is the rise in package temperature due to the power

dissipated from within.

The rise in package temperature is directly proportional to its

thermal impedance characteristics. The following equation

represents this proportionality relationship:

TR = θJA × PDR(LOSS)

where:

θJA is the thermal resistance of the package from the junction to

the outside surface of the die, where it meets the surrounding air.

PDR(LOSS) is the overall power dissipated by the IC.

The bulk of the power dissipated is due to the gate capacitance

of the external MOSFETs. The power loss equation of the MOSFET

drivers (see the MOSFET Driver Loss section in the Efficiency

Consideration section) is

PDR(LOSS) = [VDR × (fSWCupperFETVDR + IBIAS)]

+ [VDD × (fSWClowerFETVDD + IBIAS)]

where:

CupperFET is the input gate capacitance of the upper-side MOSFET.

ClowerFET is the input gate capacitance of the lower-side MOSFET.

IBIAS is the dc current (2 mA) flowing into the upper-side and

lower-side drivers.

VDR is the driver bias voltage (that is, the low input voltage (VDD)

minus the rectifier drop (see Figure 81)).

VDD is the bias voltage

For example, if the external MOSFET characteristics are θJA

(10-lead MSOP) = 171.2°C/W, fSW = 300 kHz, IBIAS = 2 mA,

CupperFET = 3.3 nF, ClowerFET = 3.3 nF, VDR = 5.12 V, and VDD = 5.5 V,

then the power loss is

PDR(LOSS) = [VDR × (fSWCupperFETVDR + IBIAS)]

+ [VDD × (fSWClowerFETVDD + IBIAS)]

= [5.12 × (300 × 103 × 3.3 × 10−9 × 5.12 + 0.002)]

+ [5.5 × (300 × 103 ×3.3 × 10−9 × 5.5 + 0.002)]

= 77.13 mW

The rise in package temperature is

TR = θJA × PDR(LOSS)

= 171.2°C × 77.13 mW

= 13.2°C

Assuming a maximum ambient temperature environment of 85°C,

the junction temperature is

TJ = TR × TA = 13.2°C + 85°C = 98.2°C

which is below the maximum junction temperature of 125°C.

DESIGN EXAMPLE

The ADP1882/ADP1883 are easy to use, requiring only a few

design criteria. For example, the example outlined in this section

uses only four design criteria: VOUT = 1.8 V, ILOAD = 15 A (pulsing),

VIN = 12 V (typical), and fSW = 300 kHz.

Input Capacitor

The maximum input voltage ripple is usually 1% of the

minimum input voltage (11.8 V × 0.01 = 120 mV).

VRIPP = 120 mV

VMAX,RIPPLE = VRIPP − (ILOAD,MAX × ESR)

= 120 mV − (15 A × 0.001) = 45 mV

105

300

RIPPLE

MAX

LOAD

IN,min

= 120 μF

Choose five 22 μF ceramic capacitors. The overall ESR of five

22 μF ceramic capacitors is less than 1 mΩ.

IRMS = ILOAD/2 = 7.5 A

PCIN = (IRMS)2 × ESR = (7.5A)2 × 1 mΩ = 56.25 mW

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