PCF8811USLASH2DASLASH1 datasheet(41/81 Pages) NXP

41 / 81 page

PCF8811_4

Product data sheet

Rev. 04 — 27 June 2008

41 of 81

NXP Semiconductors

PCF8811

80 x 128 pixels matrix LCD driver

[1]

X = value without meaning.

[2]

Bit DON can only be addressed after bit DAL is activated.

[3]

Bit DAL has priority over bit E.

[1]

This is the only default setting after reset; another setting can be selected with the ‘set partial display mode’

command.

12.1.2 Speciﬁc commands of the basic command set

Table 13.

Power-save mode (PSM), OS, DON, DAL and E combinations[1]

PSM

DON

DAL

Description

oscillator off; HVgen disabled

oscillator on; HVgen disabled

0101X

display off; pads Rn/Cn at VSS; oscillator off;

HVgen disabled[2]

01100normal display mode

01101inverse display mode

0111X

all pixels on[3]

Power-save mode: display off; pads Rn/Cn at VSS;

oscillator off; HVgen disabled

Table 14.

Read status byte

Bit

Description

BUSY

if BUSY = 0 the chip is able to accept new commands

DON

same bit as in Table 13

RES

if RES = 1 a reset is in progress

MF[2:0]

device manufacturer ID

DS0

device recognition; see Table 15

Table 15.

Device recognition[1]

DS0

Description

64 row driver

80 row driver

Table 16.

Multiplication settings

S[1:0]

Description

× voltage multiplier

Table 17.

Speciﬁc basic commands

Bit

Description

Reset state

VPR[5:0]

programming value of VLCD

00 0000

VOFF[2:0]

offset for the programming value of VLCD

000

PCF8811U/2DA/1 датащи(PDF) 41 Page - NXP Semiconductors

PCF8811U/2DA/1 датащи(HTML) 41 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81

датащи скачать

ссылки URL