PCA9537DP datasheet(13/24 Pages) NXP

13 / 24 page

PCA9537_5

Product data sheet

Rev. 05 — 7 May 2009

13 of 24

NXP Semiconductors

PCA9537

4-bit I2C-bus and SMBus low power I/O port with interrupt and reset

10. Dynamic characteristics

[1]

tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW.

[2]

tVD;DAT = minimum time for the SDA data out to be valid following SCL LOW.

[3]

Cb = total capacitance of one bus line in pF.

Table 10.

Dynamic characteristics

Symbol

Parameter

Conditions

Standard-mode

I2C-bus

Fast-mode I2C-bus

Unit

Min

Max

Min

Max

fSCL

SCL clock frequency

100

400

kHz

tBUF

bus free time between a STOP and

START condition

4.7

1.3

µs

tHD;STA

hold time (repeated) START condition

4.0

0.6

µs

tSU;STA

set-up time for a repeated START

condition

4.7

0.6

µs

tSU;STO

set-up time for STOP condition

4.0

0.6

µs

tHD;DAT

data hold time

tVD;ACK

data valid acknowledge time

[1]

0.3

3.45

0.1

0.9

µs

tVD;DAT

data valid time

[2]

300

tSU;DAT

data set-up time

250

100

tLOW

LOW period of the SCL clock

4.7

1.3

µs

tHIGH

HIGH period of the SCL clock

4.0

0.6

µs

rise time of both SDA and SCL signals

1000

20 + 0.1Cb[3]

300

fall time of both SDA and SCL signals

300

20 + 0.1Cb[3]

300

tSP

pulse width of spikes that must be

suppressed by the input ﬁlter

Port timing

tv(Q)

data output valid time

200

tsu(D)

data input set-up time

100

th(D)

data input hold time

µs

Interrupt timing

tv(INT)

valid time on pin INT

µs

trst(INT)

reset time on pin INT

µs

RESET

tw(rst)

reset pulse width

trec(rst)

reset recovery time

trst

reset time

400

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