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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LPC1759 датащи(PDF) 21 Page - NXP Semiconductors |
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LPC1759 датащи(HTML) 21 Page - NXP Semiconductors |
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21 / 64 page  LPC1759_58_56_54_52_51_4 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 26 January 2010 21 of 64 NXP Semiconductors LPC1759/58/56/54/52/51 32-bit ARM Cortex-M3 microcontroller 7.13.1 Features • One or two CAN controllers and buses. • Data rates to 1 Mbit/s on each bus. • 32-bit register and RAM access. • Compatible with CAN specification 2.0B, ISO 11898-1. • Global Acceptance Filter recognizes standard (11-bit) and extended-frame (29-bit) receive identifiers for all CAN buses. • Acceptance Filter can provide FullCAN-style automatic reception for selected Standard Identifiers. • FullCAN messages can generate interrupts. 7.14 12-bit ADC The LPC1759/58/56/54/52/51 contain one ADC. It is a single 12-bit successive approximation ADC with six channels and DMA support. 7.14.1 Features • 12-bit successive approximation ADC. • Input multiplexing among 6 pins. • Power-down mode. • Measurement range VREFN to VREFP. • 12-bit conversion rate: 200 kHz. • Individual channels can be selected for conversion. • Burst conversion mode for single or multiple inputs. • Optional conversion on transition of input pin or Timer Match signal. • Individual result registers for each ADC channel to reduce interrupt overhead. • DMA support. 7.15 10-bit DAC (LPC1759/58/56/54 only) The DAC allows to generate a variable analog output. The maximum output value of the DAC is VREFP. 7.15.1 Features • 10-bit DAC • Resistor string architecture • Buffered output • Power-down mode • Selectable output drive • Dedicated conversion timer • DMA support |
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