CS43L22 datasheet(33/66 Pages) CIRRUS

33 / 66 page

DS792F2

CS43L22

Confidential Draft

3/4/10

5. CONTROL PORT OPERATION

The control port is used to access the registers allowing the CS43L22 to be configured for the desired op-

erational modes and formats. The operation of the control port may be completely asynchronous with re-

spect to the audio sample rates. However, to avoid potential interference problems, the control port pins

should remain static if no operation is required.

The control port operates using an I²C interface with the CS43L22 acting as a slave device.

5.1

I²C Control

SDA is a bidirectional data line. Data is clocked into and out of the device by the clock, SCL. The AD0 pin

sets the LSB of the chip address; ‘0’ when connected to DGND, ‘1’ when connected to VL. This pin may be

driven by a host controller or directly connected to VL or DGND. The AD0 pin state is sensed and the LSB

of the chip address is set upon the release of the RESET signal (a low-to-high transition).

The signal timings for a read and write cycle are shown in Figure 16 and Figure 17. A Start condition is de-

fined as a falling transition of SDA while the clock is high. A Stop condition is defined as a rising transition

of SDA while the clock is high. All other transitions of SDA occur while the clock is low. The first byte sent

to the CS43L22 after a Start condition consists of a 7-bit chip address field and a R/W bit (high for a read,

low for a write).

The upper 6 bits of the address field are fixed at 100101. To communicate with the CS43L22, the chip ad-

dress field, which is the first byte sent to the CS43L22, should match 100101 followed by the setting of the

AD0 pin. The eighth bit of the address is the R/W bit. If the operation is a write, the next byte is the Memory

Address Pointer (MAP), which selects the register to be read or written. If the operation is a read, the con-

tents of the register pointed to by the MAP will be output. Setting the auto-increment bit in MAP allows suc-

cessive reads or writes of consecutive registers. Each byte is separated by an acknowledge bit. The ACK

bit is output from the CS43L22 after each input byte is read and is input to the CS43L22 from the microcon-

troller after each transmitted byte.

Since the read operation cannot set the MAP, an aborted write operation is used as a preamble. As shown

in Figure 17, the write operation is aborted after the acknowledge for the MAP byte by sending a stop con-

dition. The following pseudocode illustrates an aborted write operation followed by a read operation.

24 25

SCL

CHIP ADDRESS (WRITE)

MAP BYTE

DATA

DATA +1

START

ACK

STOP

ACK

AD0

SDA

INCR

16 17 18

10 11

13 14 15

27 28

DATA +n

Figure 16. Control Port Timing, I²C Write

SCL

CHIP ADDRESS (WRITE)

MAP BYTE

DATA

DATA +1

START

ACK

STOP

ACK

0 1 AD0 0

SDA

1 AD0 1

CHIP ADDRESS (READ)

START

INCR

12 13 14 15

20 21 22 23 24

26 27 28

10 11

17 18

ACK

DATA + n

STOP

Figure 17. Control Port Timing, I²C Read

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