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Figure 14. gpo_04 Outputs

Mirror of VCO Port Data, Clock, Latch Enable (gpo_sel=5)

setting register gpo_sel=6 (Reg1Bh<3:0> table 37) assigns the three msb’s of the delta sigma modulator first

accumulator to GPo<3:1> , where GPo3 is the msb. this feature provides insight into the phase of the Vco.

Auxiliary Oscillators (gpo_sel=7)

setting register gpo_sel=7 (Reg1Bh<3:0> table 37) assigns an auxiliary clock, an internal ring oscillator, and the

internal sigma delta clock to GPo3, 2, 1 respectively. the control of the auxiliary clock is determined by reg18h table

34 and Reg19h table 35. in general terms, this highly flexible clock source allows the selection of one of the various

Vco or crystal related clocks inside the synthesizer or the selection of a flexible unstabilized auxiliary ring oscillator

clock. any of the sources may be routed out via gpo_sel=7. additional Reg18h table 34 clock controls allow the aux

clock to be delayed by a variable amount (auxclk_modesel Reg18h<3:2>), or to be divided down by even values from

2 to 14 (auxclk_divsel Reg18h<6:4>).

Auto Calibration Busy Flag (gpo_sel=8)

setting register gpo_sel=8 (Reg1B<3:0> table 37) assigns a “vco calibration busy flag” to GPo1. this output will be

high while the auto calibration is running.

HMC701LP6CE

v05.0110

8 GHz 16-BIT FRACTIONAL-N SYNTHESIZER