LT6201CS8 datasheet(10/26 Pages) LINER

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LT6200/LT6200-5

LT6200-10/LT6201

62001fd

VOS Distribution, VCM = V+/2

INPUT OFFSET VOLTAGE (μV)

–1000

600

6200 G01

–600

–200

200

1000

VS = 5V, 0V

SO-8

INPUT OFFSET VOLTAGE (μV)

–1600–1200

1600

6200 G02

–800 –400

400 800 1200

VS = 5V, 0V

SO-8

INPUT OFFSET VOLTAGE (μV)

–1600–1200

1600

6200 G03

–800 –400

400 800 1200

VS = 5V, 0V

SO-8

VOS Distribution, VCM = V+

VOS Distribution, VCM = V–

Note 3: A heat sink may be required to keep the junction temperature

below the absolute maximum rating when the output is shorted

indeﬁnitely. The LT6201 in the DD package is limited by power dissipation

to VS ≤ 5V, 0V over the commercial temperature range only.

Note 4: The LT6200C/LT6200I and LT6201C/LT6201I are guaranteed functional

over the temperature range of –40°C and 85°C (LT6201DD excluded).

Note 5: The LT6200C/LT6201C are guaranteed to meet speciﬁed

performance from 0°C to 70°C. The LT6200C/LT6201C are designed,

characterized and expected to meet speciﬁed performance from –40°C

to 85°C, but are not tested or QA sampled at these temperatures. The

LT6200I is guaranteed to meet speciﬁed performance from –40°C to 85°C.

Note 6: Minimum supply voltage is guaranteed by power supply rejection

ratio test.

Note 7: Output voltage swings are measured between the output and

power supply rails.

Note 8: This parameter is not 100% tested.

Note 9: Full-power bandwidth is calculated from the slew rate:

FPBW = SR/2πVP

Note 10: Thermal resistance varies depending upon the amount of PC board

metal attached to the V– pin of the device. θJA is speciﬁed for a certain

amount of 2oz copper metal trace connecting to the V– pin as described in

the thermal resistance tables in the Application Information section.

Note 11: Matching parameters on the LT6201 are the difference between

the two ampliﬁers. CMRR and PSRR match are deﬁned as follows: CMRR

and PSRR are measured in μV/V on the identical ampliﬁers. The difference

is calculated in μV/V. The result is converted to dB.

Note 12: There are reverse biased ESD diodes on all inputs and outputs, as

shown in Figure 1. If these pins are forced beyond either supply, unlimited

current will ﬂow through these diodes. If the current is transient in nature

and limited to less than 30mA, no damage to the device will occur.

Supply Current vs Supply Voltage

Offset Voltage

vs Input Common Mode Voltage

Input Bias Current

vs Common Mode Voltage

TOTAL SUPPLY VOLTAGE (V)

610

6200 G04

812

TA = 125°C

TA = –55°C

TA = 25°C

INPUT COMMON MODE VOLTAGE (V)

–1.5

–1.0

0.5

1.0

3.0

6200 G05

–0.5

1.5

2.0

2.5

VS = 5V, 0V

TYPICAL PART

TA = 125°C

TA = –55°C

TA = 25°C

COMMON MODE VOLTAGE (V)

–1

6200 G06

–10

–20

–30

–40

VS = 5V, 0V

TA = 125°C

TA = –55°C

TA = 25°C

ELECTRICAL CHARACTERISTICS

TYPICAL PERFORMANCE CHARACTERISTICS

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