DM9013 datasheet(33/75 Pages) DAVICOM

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DM9013

3-port switch with Processor Interface

Preliminary datasheet

DM9013-15-DS-P03

April 9, 2009

MIB counter: RX Byte Counter Registers (00H)

MIB counter: RX Uni-cast Packet Counter Registers (01H)

MIB counter: RX Multi-cast Packet Counter Registers (02H)

MIB counter: RX Discard Packet Counter Registers (03H)

MIB counter: RX Error Packet Counter Registers (04H)

MIB counter: TX Byte Counter Registers (05H)

MIB counter: TX Uni-cast Packet Counter Registers (06H)

MIB counter: TX Multi-cast Packet Counter Registers (07H)

MIB counter: TX Discard Packet Counter Registers (08H)

MIB counter: TX Error Packet Counter Registers (09H)

6.56 Port-based VLAN mapping table Registers (B0H~BFH)

Bit

Name

Default

Description

7:4

RESERVED

PE0,RO

Reserved

3:0

PORTS

PEF,RW

Port 3(uP) 2~0

6.57 TOS Priority Map Registers (C0H~CFH)

C0H:

Bit

Name

Default

Description

7:6

TOS3

PE0/1,RW If bit 53H.7 =1 :TOS[7:2]=03H, otherwise TOS]7:5]=03H

5:4

TOS2

PE0,/1RW If bit 53H.7 =1 :TOS[7:2]=02H, otherwise TOS]7:5]=02H

3:2

TOS1

PE0,RW

If bit 53H.7 =1 :TOS[7:2]=01H, otherwise TOS]7:5]=01H

1:0

TOS0

PE0,RW

If bit 53H.7 =1 :TOS[7:2]=00H, otherwise TOS]7:5]=00H

C1H:

Bit

Name

Default

Description

7:6

TOS7

PE0/3,RW If bit 53H.7 =1 :TOS[7:2]=07H, otherwise TOS]7:5]=07H

5:4

TOS6

PE0/3,RW If bit 53H.7 =1 :TOS[7:2]=06H, otherwise TOS]7:5]=06H

3:2

TOS5

PE0/2,RW If bit 53H.7 =1 :TOS[7:2]=05H, otherwise TOS]7:5]=05H

1:0

TOS4

PE0/2,RW If bit 53H.7 =1 :TOS[7:2]=04H, otherwise TOS]7:5]=04H

C2H:

Bit

Name

Default

Description

7:6

TOSB

PE0,RW

If bit 53H.7 =1 :TOS[7:2]=0BH

5:4

TOSA

PE0,RW

If bit 53H.7 =1 :TOS[7:2]=0AH

3:2

TOS9

PE0,RW

If bit 53H.7 =1 :TOS[7:2]=09H

1:0

TOS8

PE0,RW

If bit 53H.7 =1 :TOS[7:2]=08H

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