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PCF2129A датащи(PDF) 33 Page - NXP Semiconductors

номер детали PCF2129A
подробное описание детали  Integrated RTC, TCXO and quartz crystal
PDF  68 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF2129A датащи(HTML) 33 Page - NXP Semiconductors

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PCF2129A_1
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 13 January 2010
33 of 68
NXP Semiconductors
PCF2129A
Integrated RTC, TCXO and quartz crystal
8.11 Timestamp function
The PCF2129A has an active LOW timestamp input pin TS, internally pulled with an
on-chip pull-up resistor to the internal power supply of the device. It also has a timestamp
detection circuit which can detect two different events:
1. input on the pin TS is driven to an intermediate level between the power supply and
ground.
2. input on the pin TS is driven to ground.
The timestamp function is enabled by default after power-on and it can be switched off by
setting the control bit TSOFF (register Timestp_ctl).
A most common application of the timestamp function is described in the application note
Ref. 3 “AN10857”.
See Section 8.12.5 for a description of interrupt generation from the timestamp function.
8.11.1 Timestamp flag
1. When the TS input pin is driven to an intermediate level between the power supply
and ground then the following sequence occurs:
a. The actual date and time are stored in the timestamp registers.
b. The timestamp flag TSF1 (register Control_1) is set.
c. If the TSIE bit (register Control_2) is active, an interrupt on the INT pin is
generated.
The TSF1 flag can be cleared by using the interface. Clearing the flag will clear the
interrupt. Once TSF1 is cleared it will only be set again when a new negative edge on
pin TS is detected.
2. When the TS input pin is driven to ground the following sequence occurs:
a. The actual date and time are stored in the timestamp registers.
b. In addition to the TSF1 flag, the TSF2 flag (register Control_3) is set.
c. If the TSIE bit is active, an interrupt on the INT pin is generated.
Fig 18. Timestamp detection with two push-buttons on one the TS pin (e.g. for tamper
detection)
116
PCF212xA
215
314
413
512
611
710
89
TS
VSS
VDD
013aaa176
R2 =
200 k
Ω
± 5 %
R1 =
200 k
Ω
± 20 %
push-button 1
connected to
cover 1
push-button 2
connected to
cover 2



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