ST2202A datasheet(45/75 Pages) SITRONIX

45 / 75 page

ST2202A

Ver 2.5

45/75

9/16/2008

16.4.7 LCD Frame Rate Adjust Register

The LCD frame rate adjust register (LFRA) specifies the

extended time of each scan line. Thus the frame rate slows

down to be the desired value.

Note: LFRA must be a number greater than 4.

The adjusted frame rate for 1- and 4-bit modes can be

found in the following equations

1-bit Mode

LYMAX

LFRA

LXMAX

LCDCK

Rate

Frame

⋅

)

(

Equation14-1

4-bit Mode

LYMAX

LFRA

LXMAX

LCDCK

Rate

Frame

⋅

)

(

Equation14-2

16.4.8 LCD Frame Rate Adjust Register

Address Name

R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

$049

LFRA

FRA[5]

FRA[4]

FRA[3]

FRA[2]

FRA[1]

FRA[0]

- -00 0000

Bit 5~0:

LFRA[5:0] : Extended time of each scan line

16.4.9 LCD AC Signal Rate Register

The LCD alternating signal rate register (LAC) specifies the time of horizontal lines the alternating signal toggles.

TABLE 16-8 LCD AC Signal Rate Register

Address Name

R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

$04A

LAC

R/W

AC[4]

AC[3]

AC[2]

AC[1]

AC[0]

- - -0 0000

Bit 2~0:

AC[4:0] : Time of horizontal lines the AC signal toggles

AC[4:0]

AC signal

00000

Every frame

00001

Every 3 lines

00010

Every 5 lines

00011

Every 7 lines

11101

Every 59 lines

11110

Every 61 lines

11111

Every 63 lines

16.4.10 LCD PWM Contrast Control Register

The ST2202 achieves contrast control function by outputting a PWM signal from BLANK . The duty ratio of PWM signal, also

is the contrast level, is controlled by LPWM[5:0] with 64 steps.

TABLE 16-9 LCD PWM Contrast Control Register

Address Name

R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

$04B

LPWM

R/W

LPWM[5] LPWM[4] LPWM[3] LPWM[2] LPWM[1] LPWM[0] - - 00 0000

Bit 5~0: LPWM[5~0] : LCD contrast control

LPWM[5:0]

Contrast Level

00000

64 (maximum)

00001

00010

11101

11110

11111

1 (minimum)

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