Pad Coordinates

Unit:

mm

Pad No.

X

Y

Pad No.

X

Y

1

-1077.075

1090.589

28

721.077

-1129.575

2

-1077.075

905.211

29

820.095

-1129.575

3

-1077.075

806.109

30

1076.900

-141.904

4

-1077.075

594.542

31

1076.900

-42.885

5

-1077.037

359.680

32

1076.900

56.215

6

-1077.075

260.745

33

1076.900

155.234

7

-1077.037

162.710

34

1076.900

254.335

8

-1077.075

63.734

35

1076.900

353.354

9

-1077.075

-34.789

36

1076.900

452.456

10

-1077.075

-238.247

37

1076.900

551.474

11

-1077.075

-519.705

38

1076.900

650.576

12

-1077.075

-677.315

39

1076.900

749.594

13

-1077.075

-776.416

40

1076.900

848.695

14

-1077.075

-875.435

41

1076.900

947.714

15

-1077.075

-974.536

42

1076.900

1046.816

16

-1077.075

-1073.554

43

213.669

1127.150

17

-589.281

-1129.575

44

114.650

1127.150

18

-490.179

-1129.575

45

15.550

1127.150

19

-304.799

-1129.575

46

-83.469

1127.150

20

-205.699

-1129.575

47

-182.570

1127.150

21

-20.319

-1129.575

48

-281.590

1127.150

22

78.736

-1129.575

49

-380.690

1127.150

23

225.736

-1129.575

50

-479.710

1127.150

24

324.836

-1129.575

51

-578.810

1127.150

25

423.856

-1129.575

52

-677.829

1127.150

26

522.957

-1129.575

53

-776.931

1127.150

27

621.975

-1129.575

54

-875.949

1127.150

Pad Description

Pad No.

Pad Name

I/O

Description

1CS

I

Chip selection input with Pull-high resistor. When the CS is logic high, the

data and command read from or written to the HT1622 are disabled. The se-

rial interface circuit is also reset. But if CS is at logic low level and is input to

the CS pad, the data and command transmission between the host controller

and the HT1622 are all enabled.

2RD

I

READ clock input with Pull-high resistor. Data in the RAM of the HT1622 are

clocked out on the falling edge of the RD signal. The clocked out data will ap-

pear on the data line. The host controller can use the next rising edge to latch

the clocked out data.

3WR

I

WRITE clock input with Pull-high resistor. Data on the DATA line are latched

into the HT1622 on the rising edge of the WR signal.

4

DATA

I/O

Serial data input or output with Pull-high resistor

5

VSS

¾

Negative power supply, ground

6

OSCI

I

If the system clock comes from an external clock source, the external clock

source should be connected to the OSCI pad.

7

VDD

¾

Positive power supply

8

VLCD

I

LCD operating voltage input pad

9

IRQ

O

Time base or Watchdog Timer overflow flag, NMOS open drain output

10, 11

BZ, BZ

O

2kHz or 4kHz tone frequency output pair

12~14

T1~T3

I

Not connected

15~22

COM0~COM7

O

LCD common outputs

23~54

SEG0~SEG31

O

LCD segment outputs

HT1622

Rev. 2.00

4

June 9, 2009

PATENTED