MAXQ3180-RAN+ datasheet(101/101 Pages) MAXIM

101 / 101 page

Low-Power, Multifunction, Polyphase AFE

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are

implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

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Maxim is a registered trademark of Maxim Integrated Products, Inc.

Revision History

REVISION

NUMBER

REVISION

DATE

DESCRIPTION

PAGES

CHANGED

2/08

Initial release.

—

1/09

Updated data sheet to be consistent with additional device features.

All

Removed reference to the device supporting IEC standards in the Features section;

changed the precision internal voltage reference spec from 1.23V to 2.048V.

In the Electrical Characteristics table, changed stop-mode current TYP and MAX from

1μA and 0μA to 0.2μA and 12μA, respectively; changed the input voltage range MAX

from 2V to VREF V; added VREF to output voltage SYMBOL; changed the tSCH and tSCL

MIN to 4 x tSYS and added Note 3 to CONDITIONS; changed the output voltage spec

for the internal voltage reference from 1.23V (typ) to 2.048V (typ); changed the

maximum SPI clock rate spec for the SPI slave-mode interface timing from 2MHz

(max) to fSYS/4MHz (max), and changed the tSE, tSD, tSIS, tSIH, and tSOV specs;

updated the SPI Slave Mode Timing diagram.

10, 11, 12

Updated the CFP and CFQ descriptions in the Pin Description table.

Removed statement about the IRQ line dropping low when reset causes the device

to enter Initialization Mode in the Watchdog Reset section.

Added new paragraph to the Host Software Design section about reading the virtual

registers.

Removed the Code Examples section.

26, 27, 28

Updated the bit functions for PORF and WDTR in the Global Status Register (STATUS)

(0x000) section.

Added bit 14 functionality (DSPRDY) to the IRQ_FLAG register.

Added bit 14 functionality (EDSPRDY) to the IRQ_MASK register and updated the

EDSPOR function description.

Corrected the reset valued for the OCLVL, OVLVL, and SYS_KHZ registers.

40, 41, 77

Corrected the reference of V/A to A/V in the Units Conversion Examples section

current transducer ratio (ITR) equation.

Updated the bit description for ADCMX (SCAN_IX.7:4, SCAN_VX.7:4, SCAN_IN.7:4)

and PGG.

73, 74

Updated the descriptions of the SCAN_IN and SCAN_TE registers.

75, 76

Corrected the reset value to 1 for bit 8 in the R_ADCRATE register.

8/09

Updated the phase B phasor and phase C phasor nominal values.

Changed the voltage range on VxP, IxN relative to AGND to -0.3V to +4.0V in the

Absolute Maximum Ratings section.

12/09

Added a statement that the CRC be enabled for read and write in the Host Software

Design section.

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