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ATmega32HVB датащи(PDF) 169 Page - ATMEL Corporation |
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ATmega32HVB датащи(HTML) 169 Page - ATMEL Corporation |
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169 / 273 page ![]() 169 8042A–AVR–07/09 ATmega16HVB/32HVB Figure 27-11. Data Transfer in Master Transmitter Mode A START condition is sent by writing the following value to TWCR: TWEN must be set to enable the Two-wire Serial Interface, TWSTA must be written to one to transmit a START condition and TWINT must be written to one to clear the TWINT flag. The TWI will then test the Two-wire Serial Bus and generate a START condition as soon as the bus becomes free. After a START condition has been transmitted, the TWINT flag is set by hard- ware, and the status code in TWSR will be 0x08 (see Table 27-2). In order to enter MT mode, SLA+W must be transmitted. This is done by writing SLA+W to TWDR. Thereafter the TWINT bit should be cleared (by writing it to one) to continue the transfer. This is accomplished by writing the following value to TWCR: When SLA+W have been transmitted and an acknowledgment bit has been received, TWINT is set again and a number of status codes in TWSR are possible. Possible status codes in Master mode are 0x18, 0x20, or 0x38. The appropriate action to be taken for each of these status codes is detailed in Table 27-2. When SLA+W has been successfully transmitted, a data packet should be transmitted. This is done by writing the data byte to TWDR. TWDR must only be written when TWINT is high. If not, the access will be discarded, and the Write Collision bit (TWWC) will be set in the TWCR Regis- ter. After updating TWDR, the TWINT bit should be cleared (by writing it to one) to continue the transfer. This is accomplished by writing the following value to TWCR: This scheme is repeated until the last byte has been sent and the transfer is ended by generat- ing a STOP condition or a repeated START condition. A STOP condition is generated by writing the following value to TWCR: TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN – TWIE Value 1 X1 0 X1 0 X TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN – TWIE Value 1 X0 0 X1 0 X TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN – TWIE Value 1 X0 0 X1 0 X TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN – TWIE Value 1 X0 1 X1 0 X Device 1 MASTER TRANSMITTER Device 2 SLAVE RECEIVER Device 3 Device n SDA SCL ........ R1 R2 V BUS |
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