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AT34C02C датащи(PDF) 11 Page - ATMEL Corporation |
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AT34C02C датащи(HTML) 11 Page - ATMEL Corporation |
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11 / 18 page ![]() 11 5242B–SEEPR–01/09 AT34C02C Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. To end the command, the microcontroller does not respond with an input zero but does generate a following stop con- dition (see Figure 13 on page 12). RANDOM READ: A random read requires a “dummy” byte write sequence to load in the data word address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. To end the command, the microcontroller does not respond with a zero but does generate a following stop condition (see Figure 14 on page 12). SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a ran- dom address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will “roll over” and the sequential read will continue. The sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condition (see Figure 15 on page 13). PERMANENT WRITE PROTECT REGISTER (PSWP) STATUS: To find out if the register has been programmed, the same procedure is used as to program the register except that the R/W bit is set to 1. If the device sends an acknowledge, then the permanent write protect register has not been programmed. Otherwise, it has been programmed and the device is permanently write protected at the first half of the array. Table 10. PSWP Status REVERSIBLE WRITE PROTECT REGISTER(RSWP) STATUS: To find out if the register has been programmed, the same procedure is used as to program the register except that the R/W bit is set to 1. If the sends an device acknowledge, then the reversible write protect register has not been programmed. Otherwise, it has been programmed and the device is write protected (reversible) at the first half of the array. Figure 10. Device Address Pin Preamble RW Command A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 Read PSWP A2 A1 A0 0 1 1 0 A2 A1 A0 1 |
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