ATmega165 datasheet(205/336 Pages) ATMEL

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ATmega165/V

2573G–AVR–07/09

ADC Control and Status

• Bit 7 – Res: Reserved Bit

This bit is reserved for future use. To ensure compatibility with future devices, this bit

must be written to zero when ADCSRB is written.

• Bit 2:0 – ADTS2:0: ADC Auto Trigger Source

If ADATE in ADCSRA is written to one, the value of these bits selects which source will

trigger an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no

effect. A conversion will be triggered by the rising edge of the selected Interrupt Flag.

Note that switching from a trigger source that is cleared to a trigger source that is set,

will generate a positive edge on the trigger signal. If ADEN in ADCSRA is set, this will

start a conversion. Switching to Free Running mode (ADTS[2:0]=0) will not cause a trig-

ger event, even if the ADC Interrupt Flag is set

Digital Input Disable Register

0 – DIDR0

• Bit 7..0 – ADC7D..ADC0D: ADC7..0 Digital Input Disable

When this bit is written logic one, the digital input buffer on the corresponding ADC pin is

disabled. The corresponding PIN Register bit will always read as zero when this bit is

set. When an analog signal is applied to the ADC7..0 pin and the digital input from this

pin is not needed, this bit should be written logic one to reduce power consumption in

the digital input buffer.

Bit

432

–

ACME

–

ADTS2

ADTS1

ADTS0

ADCSRB

Read/Write

R/W

Initial Value

Table 85. ADC Auto Trigger Source Selections

ADTS2

ADTS1

ADTS0

Trigger Source

Free Running mode

Analog Comparator

External Interrupt Request 0

Timer/Counter0 Compare Match

Timer/Counter0 Overflow

Timer/Counter Compare Match B

Timer/Counter1 Overflow

Timer/Counter1 Capture Event

Bit

7654

321

ADC7D

ADC6D

ADC5D

ADC4D

ADC3D

ADC2D

ADC1D

ADC0D

DIDR0

Read/Write

R/W

Initial Value

0000

000

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