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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ATmega16 датащи(PDF) 213 Page - ATMEL Corporation |
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ATmega16 датащи(HTML) 213 Page - ATMEL Corporation |
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213 / 357 page  213 2466S–AVR–05/09 ATmega16(L) Figure 106. ADC Power Connections Offset Compensation Schemes The gain stage has a built-in offset cancellation circuitry that nulls the offset of differential mea- surements as much as possible. The remaining offset in the analog path can be measured directly by selecting the same channel for both differential inputs. This offset residue can be then subtracted in software from the measurement results. Using this kind of software based offset correction, offset on any channel can be reduced below one LSB. ADC Accuracy Definitions An n-bit single-ended ADC converts a voltage linearly between GND and V REF in 2 n steps (LSBs). The lowest code is read as 0, and the highest code is read as 2 n-1. Several parameters describe the deviation from the ideal behavior: • Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition (at 0.5 LSB). Ideal value: 0 LSB. PA4 (ADC4) PA5 (ADC5) PA6 (ADC6) PA7 (ADC7) AREF AVCC GND PC7 |
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