| поискавой системы для электроныых деталей |
|
XR16M554 датащи(PDF) 9 Page - Exar Corporation |
|
|
|||||||||||||||||||||||||||||
XR16M554 датащи(HTML) 9 Page - Exar Corporation |
|
9 / 46 page ![]() XR16M554/554D 9 REV. 1.0.0 1.62V TO 3.63V QUAD UART WITH 16-BYTE FIFO 1.0 PRODUCT DESCRIPTION The XR16M554 (M554) integrates the functions of 4 enhanced 16C550 Universal Asynchrounous Receiver and Transmitter (UART). Each UART is independently controlled and has its own set of device configuration registers. The configuration registers set is 16550 UART compatible for control, status and data transfer. Additionally, each UART channel has 16 bytes of transmit and receive FIFOs, programmable baud rate generator and data rate up to 4 Mbps at 3.3 V. The XR16M554 can operate from 1.62 to 3.63 volts. The M554 is fabricated with an advanced CMOS process. Enhanced FIFO The M554 QUART provides a solution that supports 16 bytes of transmit and receive FIFO memory, instead of one byte in the ST16C454. The M554 is designed to work with high performance data communication systems, that require fast data processing time. Increased performance is realized in the M554 by the larger transmit and receive FIFOs and Receiver FIFO trigger level control. This allows the external processor to handle more networking tasks within a given time. This increases the service interval giving the external CPU additional time for other applications and reducing the overall UART interrupt servicing time. Data Bus Interface, Intel or Motorola Type The M554 provides a single host interface for the 4 UARTs and supports Intel or Motorola microprocessor (CPU) data bus interface. The Intel bus compatible interface allows direct interconnect to Intel compatible type of CPUs using IOR#, IOW# and CSA#, CSB#, CSC# or CSD# inputs for data bus operation. The Motorola bus compatible interface instead uses the R/W#, CS#, A3 and A4 signals for data bus transactions. Few data bus interface signals change their functions depending on user’s selection, see pin description for details. The Intel and Motorola bus interface selection is made through the pin 16/68#. Data Rate The M554 is capable of operation up to 4 Mbps at 3.3V. The device can operate at 3.3V with a crystal oscillator of up to 24 MHz crystal on pins XTAL1 and XTAL2, or external clock source of 64 MHz on XTAL1 pin. With a typical crystal of 14.7456 MHz and through a software option, the user can set the sampling rate for data rates of up to 921.6 Kbps. Enhanced Features The rich feature set of the M554 is available through the internal registers. Selectable receive FIFO trigger levels, programmable baud rates, infrared encoder/decoder interface and modem interface controls are all standard features. In the 16 mode INTSEL and MCR bit-3 can be configured to provide a software controlled or continuous interrupt capability. For backward compatibility to the ST16C554, the 64-pin LQFP does not have the INTSEL pin. Instead, two different LQFP packages are offered. The XR16M554DIV operates in the continuous interrupt enable mode by internally bonding INTSEL to VCC. The XR16M554IV operates in conjunction with MCR bit-3 by internally bonding INTSEL to GND. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |