11/07/08 SP7656 PowerBlox

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Copyright 2008 EXAR Corporation

3

FAULT

Register

Set Dominant

POR

ENBL

4-Bit counter

FET GATE

VIN - 0.3V

Overcurrent

Comparator

VDR

30uA

5V Internal LDO

Vin - 5V LDO

LX

GND

VDR

Power PAD

PVIN

ISET

SVIN

Internal

P-FET

R

5V

+

-

+

-

VREF

FAULT

FB

Oscillator

VIN

S

R

I = k x VIN

Error Amplifier

PWM Comparator

PWM Latch

Reset Dominant

FAULT

+

-

1V

FAULT

200ms delay

UVLO

S

R

R

PIN DESCRIPTION

PIN #

PIN NAME

DESCRIPTION

1

FB

Regulator feedback input. Connect to a resistive voltage-divider network to set the

output voltage. This pin can be also used for ON/OFF control. If this pin is pulled above

1V the controller resets internal soft start circuit.

2

GND

Ground pin.

3

VDR

Power supply for the internal driver. This voltage is internally regulated to about 5V

below VIN. Place a 0.1uF decoupling capacitor between VDR and Vin as close as

possible to the IC.

4,5

PVIN

Internal P-Channel FET Source. Connect to input voltage.

6

SVIN

Input power supply for the controller. Place input decoupling capacitor as close as

possible to this pin. Connect to input voltage.

7,9

LX

Internal P-Channel FET Drain. Connect to the output inductor.

8

ISET

This pin is used as a current limit input for the internal current limit comparator. Connect

to LX through an optional resistor. Internal threshold is pre-set to 300mV nominal and

can be decreased by changing the external resistor based on the following formula:

CONVERTER BLOCK DIAGRAM