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ADN4665 датащи(PDF) 5 Page - Analog Devices |
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ADN4665 датащи(HTML) 5 Page - Analog Devices |
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5 / 12 page ![]() ADN4665 Rev. 0 | Page 5 of 12 DINx VDIFF tPLHD tPHLD VDIFF = DOUTx+ –DOUTx– VOH VOL VOD 3V 1.5V 0V (DIFFERENTIAL) 0V 80% 20% 0V DOUTx+ DOUTx– tTLH tTHL Figure 4. Driver Propagation Delay and Transition Time Waveforms SIGNAL GENERATOR NOTES 1. CL INCLUDES LOAD AND TEST JIG CAPACITANCE. 2. S1 CONNECTED TO VCC FOR tPHZ AND tPZH TEST. 3. S1 CONNECTED TO GND FOR tPLZ AND tPZL TEST. VCC VCC S1 50 Ω 50 Ω 50 Ω 1.2V DINx DOUTx+ DOUTx– CL CL EN EN Figure 5. Test Circuit for Driver Three-State Delay DOUTx+ WITH DINx = VCC OR DOUTx– WITH DINx = GND DOUTx+ WITH DINx = GND OR DOUTx– WITH DINx = VCC 3V 1.5V 50% 50% 0V 3V 1.5V 0V VOH VOL 1.2V 1.2V EN WITH EN = GND OR OPEN CIRCUIT EN WITH EN = VCC tPZH tPHZ tPLZ tPZL Figure 6. Driver Three-State Delay Waveforms |
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