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ADN4665 датащи(PDF) 4 Page - Analog Devices

номер детали ADN4665
подробное описание детали  3 V, LVDS, Quad, CMOS Differential Line Driver
PDF  12 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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ADN4665 датащи(HTML) 4 Page - Analog Devices

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ADN4665
Rev. 0 | Page 4 of 12
TIMING CHARACTERISTICS
VCC = 3.0 V to 3.6 V, RL = 100 Ω, CL1 = 15 pF to GND, all specifications TMIN to TMAX, unless otherwise noted. All typical values are given
for VCC = 3.3 V, TA = 25°C.
Table 2.
Parameter2
Symbol
Min
Typ
Max
Unit
Conditions/Comments3, 4
AC CHARACTERISTICS
Differential Propagation Delay, High to Low
tPHLD
0.8
1.18
2.0
ns
See Figure 3 and Figure 4
Differential Propagation Delay, Low to High
tPLHD
0.8
1.25
2.0
ns
See Figure 3 and Figure 4
Differential Pulse Skew |tPHLD − tPLHD|
tSKD15
0
0.07
0.4
ns
See Figure 3 and Figure 4
Channel-to-Channel Skew
tSKD26
0
0.1
0.5
ns
See Figure 3 and Figure 4
Differential Part-to-Part Skew
tSKD37
0
1.0
ns
See Figure 3 and Figure 4
Differential Part-to-Part Skew
tSKD48
0
1.2
ns
See Figure 3 and Figure 4
Rise Time
tTLH
0.38
1.5
ns
See Figure 3 and Figure 4
Fall Time
tTHL
0.4
1.5
ns
See Figure 3 and Figure 4
Disable Time High to Inactive
tPHZ
5
ns
See Figure 5 and Figure 6
Disable Time Low to Inactive
tPLZ
5
ns
See Figure 5 and Figure 6
Enable Time Inactive to High
tPZH
7
ns
See Figure 5 and Figure 6
Enable Time Inactive to Low
tPZL
7
ns
See Figure 5 and Figure 6
Maximum Operating Frequency
fMAX9
200
250
MHz
See Figure 5 and Figure 6
RL/2
RL/2
DINx
DOUTx+
DOUTx–
VCC
VOS
VOD
NOTES
1. DRIVER IS ENABLED.
1 CL includes probe and jig capacitance.
2 AC parameters are guaranteed by design and characterization.
3 Generator waveform for all tests, unless otherwise specified: f = 50 MHz, ZO = 50 Ω, tr ≤ 1 ns, and tf ≤ 1 ns.
4 All input voltages are for one channel, unless otherwise specified. Other inputs are set to GND.
5 tSKD1 = |tPHLD − tPLHD| is the magnitude difference in differential propagation delay time between the positive-going edge and the negative-going edge of the
same channel.
6 tSKD2 is the differential channel-to-channel skew of any event on the same device.
7 tSKD3, differential part-to-part skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This specification
applies to devices at the same VCC and within 5°C of each other within the operating temperature range.
8 tSKD4, part-to-part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over the recommended operating
temperature and voltage ranges, and across process distribution. tSKD4 is defined as |maximum − minimum| differential propagation delay.
9 fMAX generator input conditions: tr = tf < 1 ns (0% to 100%), 50% duty cycle, 0 V to 3 V. Output criteria: duty cycle = 45% to 55%, VOD > 250 mV, all channels switching.
Test Circuits and Timing Diagrams
V
V
Figure 2. Test Circuit for Driver VOD and VOS
CL
CL
DINx
DOUTx+
DOUTx–
DRIVER IS
ENABLED
NOTES
1. CL INCLUDES PROBE AND JIG CAPACITANCE.
SIGNAL
GENERATOR
VCC
50
Ω
Figure 3. Test Circuit for Driver Propagation Delay and Transition Time



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