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ADIS16400/PCBZ датащи(PDF) 11 Page - Analog Devices |
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ADIS16400/PCBZ датащи(HTML) 11 Page - Analog Devices |
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11 / 20 page ![]() ADIS16400/ADIS16405 Rev. B | Page 11 of 20 MEMORY MAP Table 8. User Register Memory Map Name R/W Flash Backup Address1 Default Function Bit Assignments FLASH_CNT R Yes 0x00 N/A Flash memory write count N/A SUPPLY_OUT R No 0x02 N/A Power supply measurement See Table 9 XGYRO_OUT R No 0x04 N/A X-axis gyroscope output See Table 9 YGYRO_OUT R No 0x06 N/A Y-axis gyroscope output See Table 9 ZGYRO_OUT R No 0x08 N/A Z-axis gyroscope output See Table 9 XACCL_OUT R No 0x0A N/A X-axis accelerometer output See Table 9 YACCL_OUT R No 0x0C N/A Y-axis accelerometer output See Table 9 ZACCL_OUT R No 0x0E N/A Z-axis accelerometer output See Table 9 XMAGN_OUT R No 0x10 N/A X-axis magnetometer measurement See Table 9 YMAGN_OUT R No 0x12 N/A Y-axis magnetometer measurement See Table 9 ZMAGN_OUT R No 0x14 N/A Z-axis magnetometer measurement See Table 9 TEMP_OUT R No 0x16 N/A Temperature output See Table 9 AUX_ADC R No 0x18 N/A Auxiliary ADC measurement See Table 9 XGYRO_OFF R/W Yes 0x1A 0x0000 X-axis gyroscope bias offset factor See Table 10 YGYRO_OFF R/W Yes 0x1C 0x0000 Y-axis gyroscope bias offset factor See Table 10 ZGYRO_OFF R/W Yes 0x1E 0x0000 Z-axis gyroscope bias offset factor See Table 10 XACCL_OFF R/W Yes 0x20 0x0000 X-axis acceleration bias offset factor See Table 11 YACCL_OFF R/W Yes 0x22 0x0000 Y-axis acceleration bias offset factor See Table 11 ZACCL_OFF R/W Yes 0x24 0x0000 Z-axis acceleration bias offset factor See Table 11 XMAGN_HIF R/W Yes 0x26 0x0000 X-axis magnetometer, hard-iron factor See Table 12 YMAGN_HIF R/W Yes 0x28 0x0000 Y-axis magnetometer, hard-iron factor See Table 12 ZMAGN_HIF R/W Yes 0x2A 0x0000 Z-axis magnetometer, hard-iron factor See Table 12 XMAGN_SIF R/W Yes 0x2C 0x0800 X-axis magnetometer, soft-iron factor See Table 13 YMAGN_SIF R/W Yes 0x2E 0x0800 Y-axis magnetometer, soft-iron factor See Table 13 ZMAGN_SIF R/W Yes 0x30 0x0800 Z-axis magnetometer, soft-iron factor See Table 13 GPIO_CTRL R/W No 0x32 0x0000 Auxiliary digital input/output control See Table 18 MSC_CTRL R/W Yes 0x34 0x0006 Miscellaneous control See Table 19 SMPL_PRD R/W Yes 0x36 0x0001 Internal sample period (rate) control See Table 15 SENS_AVG R/W Yes 0x38 0x0402 Dynamic range and digital filter control See Table 17 SLP_CNT W No 0x3A 0x0000 Sleep mode control See Table 16 DIAG_STAT R No 0x3C 0x0000 System status See Table 23 GLOB_CMD W N/A 0x3E 0x0000 System command See Table 14 ALM_MAG1 R/W Yes 0x40 0x0000 Alarm 1 amplitude threshold See Table 25 ALM_MAG2 R/W Yes 0x42 0x0000 Alarm 2 amplitude threshold See Table 25 ALM_SMPL1 R/W Yes 0x44 0x0000 Alarm 1 sample size See Table 26 ALM_SMPL2 R/W Yes 0x46 0x0000 Alarm 2 sample size See Table 26 ALM_CTRL R/W Yes 0x48 0x0000 Alarm control See Table 24 AUX_DAC R/W No 0x4A 0x0000 Auxiliary DAC data See Table 20 0x4C to 0x55 Reserved PRODUCT_ID 0x56 0x4105 Product identifier 1 Each register contains two bytes. The address of the lower byte is displayed. The address of the upper byte is equal to the address of the lower byte plus 1. R/W R/W A6 A5 A4 A3 A2 A1 A0 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 NOTES 1. DOUT BITS ARE BASED ON THE PREVIOUS 16-BIT SEQUENCE (R = 0). CS SCLK DIN DOUT A6 A5 D13 D14 D15 Figure 11. Output Register Bit Assignments |
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