ADIS16240

Rev. 0 | Page 10 of 1

6

MEMORY MAP

Note that all registers are two bytes. All unused memory locations are reserved for future use.

Table 7. User Register Memory Map

Register

Name

Read/

Write

Flash

Backup

Register

Address1

Default

Function

Bit

Assignments

FLASH_CNT

R

Yes

0x00

N/A

Flash memory write count

N/A

SUPPLY_OUT

R

No

0x02

N/A

Output, power supply

See Table 10

XACCL_OUT

R

No

0x04

N/A

Output, x-axis accelerometer

See Table 9

YACCL_OUT

R

No

0x06

N/A

Output, y-axis accelerometer

See Table 9

ZACCL_OUT

R

No

0x08

N/A

Output, z-axis accelerometer

See Table 9

AUX_ADC

R

No

0x0A

N/A

Output, auxiliary ADC input

See Table 8

TEMP_OUT

R

No

0x0C

N/A

Output, temperature

See Table 11

XPEAK_OUT

R

No

0x0E

N/A

Output, x-axis acceleration peak

See Table 9

YPEAK_OUT

R

No

0x10

N/A

Output, y-axis acceleration peak

See Table 9

ZPEAK_OUT

R

No

0x12

N/A

Output, z-axis acceleration peak

See Table 9

XYZPEAK_OUT

R

No

0x14

N/A

Output, sum-of-squares acceleration peak

See Table 8

CAPT_BUF1

R

0x16

N/A

Output, Capture Buffer 1, X and Y acceleration

See Table 18

CAPT_BUF2

R

0x18

N/A

Output, Capture Buffer 2, Z acceleration

See Table 19

DIAG_STAT

R

0x1A

0x0000

Diagnostic, error flags

See Table 28

EVNT_CNTR

R

0x1C

0x0000

Diagnostic, event counter

See Table 21

CHK_SUM

R

Yes

0x1E

N/A

Diagnostic, check sum value from firmware test

See Table 34

XACCL_OFF

R/W

Yes

0x20

0x0000

Calibration, x-axis acceleration offset adjustment

See Table 27

YACCL_OFF

R/W

Yes

0x22

0x0000

Calibration, y-axis acceleration offset adjustment

See Table 27

ZACCL_OFF

R/W

Yes

0x24

0x0000

Calibration, z-axis acceleration offset adjustment

See Table 27

CLK_TIME

R/W

Yes

0x2E

0x0000

Clock, hour and minute

See Table 29

CLK_DATE

R/W

Yes

0x30

0x0000

Clock, month and day

See Table 30

CLK_YEAR

R/W

Yes

0x32

0x0000

Clock, year

See Table 31

WAKE_TIME

R/W

Yes

0x34

0x0000

Wake-up setting, hour and minute

See Table 32

WAKE_DATE

R/W

Yes

0x36

0x0000

Wake-up setting, month and day

See Table 33

ALM_MAG1

R/W

Yes

0x38

0x9000

Alarm 1 amplitude threshold

See Table 13

ALM_MAG2

R/W

Yes

0x3A

0x9000

Alarm 2 amplitude threshold

See Table 13

ALM_CTRL

R/W

Yes

0x3C

0x0000

Alarm control

See Table 12

XTRIG_CTRL

R/W

Yes

0x3E

0x0000

Capture, external trigger control

See Table 15

CAPT_PNTR

R/W

Yes

0x40

0x0000

Capture, address pointer

See Table 20

CAPT_CTRL

R/W

Yes

0x42

0x0022

Capture, configuration and control

See Table 17

GPIO_CTRL

R/W

No

0x44

0x0000

General-purpose digital input/output control

See Table 26

MSC_CTRL

R/W

No

0x46

0x0006

Miscellaneous control

See Table 25

SMPL_PRD

R/W

Yes

0x48

0x001F

Internal sample period (rate) control

See Table 23

GLOB_CMD

W

Yes

0x4A

N/A

System command

See Table 24

R/W

R/W

A6

A5

A4

A3

A2

A1

A0

DC7

DC6

DC5

DC4

DC3

DC2

DC1

DC0

D0

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11

D12

D13

D14

D15

NOTES

1. DOUT BITS ARE BASED ON THE PREVIOUS 16-BIT SEQUENCE, WHEN R/W = 0.

CS

SCLK

DIN

DOUT

A6

A5

D13

D14

D15

Figure 18. SPI Communication Bit Sequence