ADIS16240

Rev. 0 | Page 6 of

16

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

2

14

5 6

9 10 11

3

7 8

A

B

TOP VIEW

NOTES

1. THE ACTUAL PINS ARE NOT

VISIBLE FROM THE TOP VIEW.

C

D

E

F

G

J

H

K

L

Figure 4. Pin Configuration (Top View)

A1

X

Figure 5. Axis Orientation of Device (Top View)

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Type1

Description

E10, E11

SCLK

I

SPI Serial Clock

F10, F11

CS

I

SPI Chip Select, Active Low

G10, G11

DIN

I

SPI Data Input

H10, H11

DOUT

O

SPI Data Output

J10, J11

DIO2

I/O

Multifunction Digital Input/Output 2

K9, L9

DIO1

I/O

Multifunction Digital Input/Output 1

K8, L8

AN

I

Analog Input Channel

K7, L7

CMP2

I

Analog Comparator Input 2

K6, L6

CMP1

I

Analog Comparator Input 1

K3, L3

RST

I

Reset, Active Low, No Pull-Up Resistor

J1, J2

XA

O

X-Axis Accelerometer Filter Pin

H1, H2

YA

O

Y-Axis Accelerometer Filter Pin

G1, G2

ZA

O

Z-Axis Accelerometer Filter Pin

A5, B5

ST

I

Self-Test Input Control Line

D4 to D8, E4, E8, F4, F8, G4, G8, H4 to H8

VDD

S

Power Supply, 3.3 V

A1, A2, A10, A11, B1, B2, B10, B11, C3 to C9, D3, D9, E3, E9, F3, F9,

G3, G9, H3, H9, J3 to J9, K1, K2, K10, K11, L1, L2, L10, L11

GND

S

Ground

A3, A4, A6 to A9, B3, B4, B6 to B9, C1, C2, C10, C11, D1, D2, D10,

D11, E1, E2, F1, F2, K4, K5, L4, L5

NC

No Connect