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TMC22091 датащи(PDF) 21 Page - Cadeka Microcircuits LLC.

номер детали TMC22091
подробное описание детали  Digital Video Encoders/Layering Engine
PDF  60 Pages
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производитель  CADEKA [Cadeka Microcircuits LLC.]
домашняя страница  http://www.cadeka.com
Logo CADEKA - Cadeka Microcircuits LLC.

TMC22091 датащи(HTML) 21 Page - Cadeka Microcircuits LLC.

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PRODUCT SPECIFICATION
TMC22091/TMC22191
21
Control Register Definitions (continued)
Timing Register (18)
7
6
5
4
3
2
1
0
XBP
VA
VC
VB
Reg
Bit
Name
Function
18
7-6
XBP
Extended color back porch 2 MSBs. These two bits hold the MSBs of a 10-bit
value extending from 0 to 1023 PCK cycles. The LSBs are located in control
register 14.
18
5-4
VA
Active video 2 MSB. These two bits hold the MSBs of a 10-bit value extending
from 0 to 1023 PCK cycles. The LSBs are located in control register 15.
18
3-2
VC
Active video start 2 MSBs. These two bits hold the MSBs of a 10-bit value which
is the initial half active video length extending from 0 to 1023 PCK cycles. The
LSBs are located in control register 16.
18
1-0
VB
Active video end 2 MSBs. These two bits hold the MSBs of a 10-bit value which
is the end half active video length extending from 0 to 1023 PCK cycles. The
LSBs are located in control register 17.
Timing Registers (19-1E)
Reg
Bit
Name
Function
19
7-0
FP
Front porch length. This 8-bit register holds a value extending from 0 to 255
PCK cycles.
1A
7-0
EL
Equalization pulse LOW length. This 8-bit register holds a value from 0 to 255
PCK cycles.
1B
7-0
EH
Equalization pulse HIGH length. This 8-bit register holds a value extending from
0 to 255 PCK cycles. This value, when added to 256 (or 512), determines the
final pulse length in the range of 256 to 511 (or 767) PCK cycles.
1C
7-0
SL
Vertical sync LOW length. This 8-bit register holds a value from 0 to 255 PCK
cycles. This value, when added to 256 (or 512), determines the final pulse
length in the range of 256 to 511 (or 767) PCK cycles.
1D
7-0
SH
Vertical sync HIGH length. This 8-bit register holds a value extending from 0 to
255 PCK cycles.
1E
7-0
CBL
Color bar length. This 8-bit register holds a value which is the length of each
color bar displayed extending from 0 to 255 PCK cycles.
Timing Register (1F)
7
6
5
4
3
2
1
0
FIELD
LTYPE
Reg
Bit
Name
Function
1F
7-5
FIELD
Field identification (read only). These three bits are updated 12 PXCK periods
after each VHSYNC. They allow the user to determine field type on a
continuous basis.
1F
4-0
LTYPE
Line type identification (read only). These five bits are updates 5 PXCK periods
after each VHSYNC. They allow the user to determine line type on a continuous
basis.



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