SPT8100 datasheet(2/10 Pages) CADEKA

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SPT8100

ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)1 25 °C

Supply Voltages

AVDD ...................................................................... +6 V

DVDD ..................................................................... +6 V

OVDD ..................................................................... +6 V

Input Voltages

Analog Input ................................. –0.5 V to VDD +0.5 V

CLK Input ............................................................... VDD

AVDD – DVDD .................................................. ±100 mV

Delta between AGND, DGND, and OGND ...... ±100 mV

Output

Digital Outputs .................................................... 10 mA

Temperature

Operating Temperature ........................... –40 to +85 °C

Junction Temperature ...................................... +175 °C

Lead Temperature (soldering 10 seconds) ...... +300 °C

Storage Temperature ............................ –65 to +150 °C

Note 1: Operation at any Absolute Maximum Rating is not implied. See

Electrical Specifications for proper nominal applied conditions in

typical applications.

ELECTRICAL SPECIFICATIONS

TA=TMIN to TMAX, AVDD=DVDD=+5.0 V, OVDD= 3.3 V, ƒS=5 MSPS, 2.5 VPP input span, Gain=0 dB, REXT=1.43 kΩ, unless

otherwise specified.

TEST

SPT8100

PARAMETERS

CONDITIONS

LEVEL

MIN

TYP

MAX

UNITS

Resolution

15.9

Bits

DC Accuracy

Integral Linearity Error (ILE)

±1.25

LSB

Differential Linearity Error (DLE)

±0.5

LSB

Gain Error1

–7.5

+7.5

%FSR

Offset Error2

–5+5

%FSR

Analog Input (into PGA)

Differential Input Voltage Range

VIN+, VIN–

VPPD

Input Capacitance

Input Resistance3

PGA Gain = 0 dB

5.5

Ω

Input Bandwidth4

PGA Gain = 0 dB

MHz

Input Common Mode Voltage Range

1.15

2.40

3.65

Programmable Gain Amp

Composite Input-Referred

ƒIN > 300 kHz

Noise Floor

PGA Gain = 0 dB

1.4

LSBRMS

PGA Gain = 2.9 dB

1.5

LSBRMS

PGA Gain = 5.8 dB

1.6

LSBRMS

PGA Gain = 11.8 dB

2.0

LSBRMS

PGA Gain = 14.8 dB

2.3

LSBRMS

PGA Gain = 17.5 dB

2.6

LSBRMS

PGA Gain = 19.5 dB

2.8

LSBRMS

PGA Range

19.5

PGA Gain Steps3

0,2.9,5.8,11.8,14.8,17.5,19.5

PGA Gain Accuracy

±0.3

Conversion Characteristics

Maximum Conversion Rate

MSPS

Pipeline Delay (Latency)5

5.5

Clocks

Reset Pulse Time (RS)

Clocks

Reset Calibration Time

FS = 5 MSPS

150

References and External Bias

VRT – VRB (Internal Ref)

2.375

2.5

2.625

Bias Resistor Range (External)

800

1430

2500

Ω

VCM Output Voltage

2.275

2.40

2.525

VCM Output Current

µA

VRT

3.45

3.65

3.85

VRB

0.95

1.15

1.35

Total gain error of PGA and ADC using internal references.

Total offset error of PGA and ADC relative to mid-scale.

See table I for input resistance as a function of PGA gain.

Input bandwidth is a frequency to which the fundamental energy drops by 3 dB

The input is sampled on the falling edge of the clock and is available on the

output after the rising edge of the clock, 5.5 clock cycles later.

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