TPS73701DCQ datasheet(12/22 Pages) TI

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RMS

)=8.5

(V)

x V

OUT

()

mVRMS

(3)

DROPOUT VOLTAGE

BOARD LAYOUT RECOMMENDATION TO

TRANSIENT RESPONSE

INTERNAL CURRENT LIMIT

ENABLE PIN AND SHUTDOWN

TPS737xx

SBVS067I – JANUARY 2006 – REVISED MARCH 2009.................................................................................................................................................... www.ti.com

An internal 27k

Ω resistor in series with the noise

When shutdown capability is not required, EN can be

reduction pin (NR) forms a low-pass filter for the

connected to VIN. However, the pass gate may not be

voltage reference when an external noise reduction

discharged using this configuration, and the pass

capacitor, CNR, is connected from NR to ground. For

transistor may be left on (enhanced) for a significant

CNR = 10nF, the total noise in the 10Hz to 100kHz

time after VIN has been removed. This scenario can

bandwidth is reduced by a factor of ~3.2, giving the

result in reverse current flow (if the IN pin is low

approximate relationship:

impedance) and faster ramp times upon power-up. In

addition, for VIN ramp times slower than a few

milliseconds,

the

output

may

overshoot

upon

power-up.

for CNR = 10nF.

This noise reduction effect is shown as RMS Noise

The TPS737xx uses an NMOS pass transistor to

Voltage vs CNR in the Typical Characteristics section.

achieve extremely low dropout. When (VIN – VOUT) is

The TPS73701 adjustable version does not have the

less than the dropout voltage (VDO), the NMOS pass

NR pin available. However, connecting a feedback

device is in its linear region of operation and the

capacitor, CFB, from the output to the feedback pin

input-to-output resistance is the RDS, ON of the NMOS

(FB) reduces output noise and improve load transient

pass element.

performance. This capacitor should be limited to

For large step changes in load current, the TPS737xx

0.1µF.

requires a larger voltage drop from VIN to VOUT to

avoid degraded transient response. The boundary of

The TPS737xx uses an internal charge pump to

this transient dropout region is approximately twice

develop an internal supply voltage sufficient to drive

the dc dropout. Values of VIN – VOUT above this line

the gate of the NMOS pass element above VOUT. The

ensure normal transient response.

charge pump generates ~250

µV of switching noise at

~4MHz; however, charge-pump noise contribution is

Operating in the transient dropout region can cause

negligible at the output of the regulator for most

an increase in recovery time. The time required to

values of IOUT and COUT.

recover from a load transient is a function of the

magnitude of the change in load current rate, the rate

change

load

current,

and

the

available

IMPROVE PSRR AND NOISE PERFORMANCE

headroom

(VIN to VOUT voltage drop). Under

worst-case conditions [full-scale instantaneous load

To improve ac performance such as PSRR, output

change with (VIN – VOUT) close to dc dropout levels],

noise, and transient response, it is recommended that

the TPS737xx can

take

couple

hundred

the printed circuit board (PCB) be designed with

microseconds to return to the specified regulation

separate ground planes for VIN and VOUT, with each

accuracy.

ground plane connected only at the GND pin of the

device. In addition, the ground connection for the

bypass capacitor should connect directly to the GND

pin of the device.

The low open-loop output impedance provided by the

NMOS

pass

element

voltage

follower

configuration allows operation without a 1.0µF output

capacitor. As with any regulator, the addition of

The TPS737xx internal current limit helps protect the

additional capacitance from the OUT pin to ground

regulator during fault conditions. Foldback current

reduces undershoot magnitude but increases its

limit helps to protect the regulator from damage

duration. In the adjustable version, the addition of a

during output short-circuit conditions by reducing

capacitor, CFB, from the OUT pin to the FB pin will

current limit when VOUT drops below 0.5V. See

also improve the transient response.

Figure 12 in the Typical Characteristicssection.

The enable pin (EN) is active high and is compatible

with standard TTL-CMOS levels. A VEN below 0.5V

(max) turns the regulator off and drops the GND pin

current to approximately 10nA. When EN is used to

shutdown the regulator, all charge is removed from

the pass transistor gate, and the output ramps back

up to a regulated VOUT (see Figure 23).

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