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TPS51113 датащи(PDF) 7 Page - Texas Instruments |
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TPS51113 датащи(HTML) 7 Page - Texas Instruments |
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7 / 26 page ![]() FUNCTIONAL BLOCK DIAGRAM 1 3 2 4 10 9 8 7 PGOOD VOS FB COMP_EN BOOT SW HDRV LDRV_OC TPS51113\TPS51163 5 6 VDD GND UV/OVand PGOOD Control 3.3-V Regulator 3.3V PWM Logic + SS Oscillator Self-Calibrationand Soft-StartControl + 0.8V OCP Logic 3.3V UDG-08106 S1 Anti-Cross Conduction RAMP + CurrentSense CLK PWM PERFORMANCE DATA 0 1.599 1.595 4 V VDD = 5 V, VBOOT = 5 V V VDD = 10 V, VBOOT = 10 V V VDD = 12 V, VBOOT = 12 V 8 12 16 20 24 1.597 1.605 1.601 1.603 I OUT – Output Current – A 5 6 V IN – Input Voltage – V 1.599 1.595 1.597 1.605 1.601 1.603 7 8 9 10 11 12 I OUT = 20 A TPS51113, TPS51163 www.ti.com........................................................................................................................................................................................................ SLUS864 – MAY 2009 Figure 1. Load Regulation Figure 2. Line Regulation Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s) :TPS51113 TPS51163 |
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